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NSAM265SRA Datasheet(PDF) 7 Page - National Semiconductor (TI) |
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NSAM265SRA Datasheet(HTML) 7 Page - National Semiconductor (TI) |
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7 / 58 page  10 Theory of Operation (Continued) When a message is created with the WRAM command the data to be recorded is provided by the microcontroller and not the codec The data is transferred directly to the mes- sage memory It is not compressed by the Compact- SPEECH voice compression algorithm The WRAM command together with the RRAM (Read RAM) command which enables the microcontroller to read data from the CompactSPEECH can be used to store data other than compressed voice in the message memory For example in the NSAM265SF the AFLASH memory can be used to store a telephone directory A message can be played back (P command) and deleted (DM command) Redundant data (eg trailing tones or si- lence) can be removed from the message tail with the CMT (Cut Message Tail) command The PA and RES (Resume) commands respectively tem- porarily suspend the P and R commands and then allow them to resume execution from where they were suspend- ed Current Message Most message handling commands eg P DM RRAM op- erate on the current message The GTM (Get Tagged Mes- sage) command selects the current message Deleting the current message does not cause a different message to become current The current message is unde- fined If however you issue the GTM command to skip to the next message the first message that is newer than the just deleted message will be selected as the current message 151 Message Tag Each message has a 2-byte message tag which you can use to categorize messages and implement such features as OutGoing Messages mailboxes and different handling of old and new messages In the NSAM265SR bits 0 – 6 are application definable bits 7 – 15 are reserved In the NSAM265SF bits 0 – 14 are application definable bit 15 is the MESSAGE SAFE bit The MESSAGE SAFE bit should be used to record safe (non-volatile) messages (eg OGMs) when the NSAM265SF is configured to memory-in- tensive mode (see Section 173) For memory-management reasons the NSAM265SF must keep at least one FLASH block without safe messages If there is no such block available during recording of a safe message or when the microcontroller tries to create a new message with the R or WRAM command recording stops and the EV MEMFULL bit in the status word is set The GMT (Get Message Tag) and SMT commands may be used to handle message tags Note For the NSAM265SF message tag bits can only be cleared Message tag bits are set only when a message is first created This limitation is inherent in FLASH memories which only allow bits to be changed from 1 to 0 (changing bits from 0 to 1 requires a special erasure procedure see Section 171) However the main reason for updating an existing tag is to mark a message as old and this can be done by using one of the bits as a newold indicator setting it to 1 when a message is first created and clearing it when necessary 16 ARAM SUPPORT The NSAM265SR supports up to two 4-Mbit (1M c 4) ARAM devices or one 16-Mbit (4M x 4) device for storing messages An ARAM device is actually a bad DRAM device ie it may contain bad bits The NSAM265SR can use such devices for message recording without noticeable effect on voice quality if they conform to the specifications described in Section 26 After an ARAM mapping process (see the AMAP command) which marks bad ARAM rows which can not be used for recording the NSAM265SR can use the rest of the ARAM space for message recording A single 1-Mbit c 4 ARAM device holds an average of 15 minutes of recording time (actual time may vary because of environmental conditions eg speech attributes background noise etc) 17 FLASH SUPPORT The NSAM265SF CompactSPEECH supports 4-Mbit and 8-Mbit byte wide AFLASH devices for storing messages A FLASH device is organized in 64 Kbytes blocks An AFLASH device is a FLASH device with one or more bad blocks which can not be used for message recording The NSAM265SF can use such devices for message recording without any affect on voice quality if they conform to the specifications described in Section 29 There are two major problems imposed by current FLASH technology block erasure time and FLASH endurance Both these limitations are handled by the CompactSPEECH firmware 171 Block Erasure The basic software interface to a DRAM device includes read and write operations Writing a value to a memory loca- tion simply replaces its contents In a FLASH environment an erase operation is also re- quired You must ensure that a memory location which was previously written is erased prior to writing The basic unit that can be read or written is a byte the basic unit that can be erased is an entire 64 Kbytes block Block erasure takes time The following erasure times are quoted from AMD and INTEL datasheets for devices sup- ported by the NSAM265SF INTEL 28F008SA 16 sec (typical) 10 sec (max) AMD AM29F040 15 sec (min) 30 sec (max) A FLASH memory can not be written while erasure is in progress During erasure access to the FLASH is not al- lowed The CompactSPEECH however accepts com- mands which do not require FLASH access (eg Get Status) during erasure 172 Flash Endurance FLASH memories may be erased a limited number of times Currently FLASH manufacturers do not guarantee more than 100000 erase cycles To reduce the effect of this limitation the memory manager utilizes FLASH blocks evenly ie each block is erased more or less the same number of times to ensure that all blocks have the same lifetime Consider the following extensive usage of all FLASH blocks 1 Record 15 minutes of messages (until the memory is full) 2 Playback 15 minutes (all the recorded messages) 3 Delete all messages Assuming a 4-Mbit FLASH device is used in this manner 24 times a day the expected life time of the FLASH is Flash Lifetime e 100000 (24 365) e 114 years Thus the FLASH device will last for over ten years even when used for six hours of recording per day Note that if two 4-Mbit devices are used then under the same conditions each device will last for more than 20 years 7 |
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