74HC648 datasheet(6/12 Pages) PHILIPS

Part #	74HC648

Description	Octal bus transceiver/register; 3-state; inverting

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Manufacturer	PHILIPS [NXP Semiconductors]

Direct Link	http://www.nxp.com

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6 / 12 page

December 1990

6

Philips Semiconductors

Product speciﬁcation

Octal bus transceiver/register; 3-state;

inverting

74HC/HCT648

DC CHARACTERISTICS FOR 74HC

For the DC characteristics see

“74HC/HCT/HCU/HCMOS Logic Family Specifications”.

Output capability: bus driver

ICC category: MSI

AC CHARACTERISTICS FOR 74HC

GND = 0 V; tr =tf = 6 ns; CL = 50 pF

SYMBOL

PARAMETER

Tamb (°C)

UNIT

TEST CONDITIONS

74HC

VCC

(V)

WAVEFORMS

+25

−40 to +85

−40 to +125

min.

typ.

max.

min.

max.

min.

max.

tPHL/ tPLH

propagation delay

An, Bn to Bn, An

39

14

11

135

27

23

170

34

29

205

41

35

ns

2.0

4.5

6.0

Fig.6

tPHL/ tPLH

propagation delay

CPAB, CPBA to Bn, An

74

27

22

230

46

39

290

58

49

345

69

59

ns

2.0

4.5

6.0

Fig.7

tPHL/ tPLH

propagation delay

SAB, SBA to Bn, An

55

20

16

190

38

32

240

48

41

285

57

48

ns

2.0

4.5

6.0

Fig.8

tPZH/ tPZL

3-state output enable

time OE to An, Bn

52

19

15

175

35

30

220

44

37

265

53

45

ns

2.0

4.5

6.0

Fig.9

tPHZ/ tPLZ

3-state output disable

time OE to An, Bn

61

22

18

175

35

30

220

44

37

265

53

45

ns

2.0

4.5

6.0

Fig.9

tPZH/ tPZL

3-state output enable

time DIR to An, Bn

52

19

15

175

35

30

220

44

37

265

53

45

ns

2.0

4.5

6.0

Fig.10

tPHZ/ tPLZ

3-state output disable

time DIR to An, Bn

55

20

16

175

35

30

220

44

37

265

53

45

ns

2.0

4.5

6.0

Fig.10

tTHL/ tTLH

output transition time

14

5

4

60

12

10

75

15

13

90

18

15

ns

2.0

4.5

6.0

Fig.6 and Fig.8

tW

clock pulse width

HIGH or LOW

CPAB or CPBA

80

16

14

25

9

7

100

20

17

120

24

20

ns

2.0

4.5

6.0

Fig.7

tsu

set-up time

An, Bn to CPAB, CPBA

60

12

10

0

75

15

13

90

18

15

ns

2.0

4.5

6.0

Fig.7

th

hold time

An, Bn to CPAB, CPBA

35

7

6

2

45

9

8

55

11

9

ns

2.0

4.5

6.0

Fig.7

fmax

maximum clock pulse

frequency

6.0

30

35

22

68

81

4.8

24

28

4.0

20

24

MHz

2.0

4.5

6.0

Fig.7

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