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| 74LV377 |
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 PHILIPS
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6 page 
Philips Semiconductors Product specification 74LV377 Octal D-type flip-flop with data enable; positive edge-trigger 1998 Jun 10 6 AC CHARACTERISTICS GND = 0V; tr = tf ≤ 2.5ns; CL = 50pF; RL =1KW CONDITION LIMITS SYMBOL PARAMETER WAVEFORM CONDITION –40 to +85 °C –40 to +125 °C UNIT VCC(V) MIN TYP1 MAX MIN MAX 1.2 – 80 – – – t /t Propagation delay Figure 1 2.0 – 27 51 – 61 ns tPHL/tPLH gy CP to Qn Figure 1 2.7 – 20 38 – 45 ns 3.0 to 3.6 – 152 30 – 36 Cl k l idth 2.0 34 9 – 41 – tW Clock pulse width HIGH or LOW Figure 2 2.7 25 6 – 30 – ns HIGH or LOW 3.0 to 3.6 20 52 – 24 – 1.2 – 25 – – – t Set-up time Figure 2 2.0 22 9 – 26 – ns tsu Dn to CP Figure 2 2.7 16 6 – 19 – ns 3.0 to 3.6 13 52 – 15 – 1.2 – 10 – – – t Set-up time Figure 2 2.0 22 4 – 26 – ns tsu E to CP Figure 2 2.7 16 3 – 19 – ns 3.0 to 3.6 13 22 – 15 – 1.2 – –15 – – – t Hold time Figure 2 2.0 5 –5 – 5 – ns th Dn to CP Figure 2 2.7 5 –4 – 5 – ns 3.0 to 3.6 5 –32 – 5 – 1.2 – –5 – – – t Hold time Figure 2 2.0 5 –2 – 5 – ns th E to CP Figure 2 2.7 5 –2 – 5 – ns 3.0 to 3.6 5 –12 – 5 – Mi lk 2.0 14 40 – 12 – fmax Maximum clock pulse frequency Figure 1 2.7 19 58 – 16 – MHz ulse frequency 3.0 to 3.6 24 702 – 20 – NOTES: 1. Unless otherwise stated, all typical values are at Tamb = 25°C. 2. Typical value measured at VCC = 3.3V. |
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