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ST72334J Datasheet(PDF) 5 Page - STMicroelectronics

Part No. ST72334J
Description  8-BIT MCU WITH SINGLE VOLTAGE FLASH MEMORY, ADC, 16-BIT TIMERS, SPI, SCI INTERFACES
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Maker  STMICROELECTRONICS [STMicroelectronics]
Homepage  http://www.st.com
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Table of Contents
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1 PREAMBLE: ST72C334 VERSUS ST72E331 SPECIFICATION
New Features available on the ST72C334
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8 or 16K FLASH/ROM with In-Situ Programming and Read-out protection
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New ADC with a better accuracy and conversion time
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New configurable Clock, Reset and Supply system
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New power saving mode with real time base: Active Halt
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Beep capability on PF1
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New interrupt source: Clock security system (CSS) or Main clock controller (MCC)
ST72C334 I/O Confuguration and Pinout
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Same pinout as ST72E331
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PA6 and PA7 are true open drain I/O ports without pull-up (same as ST72E331)
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PA3, PB3, PB4 and PF2 have no pull-up configuration (all IOs present on TQFP44)
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PA5:4, PC3:2, PE7:4 and PF7:6 have high sink capabilities (20mA on N-buffer, 2mA on P-buffer and
pull-up). On the ST72E331, all these pads (except PA5:4) were 2mA push-pull pad without high sink
capabilities. PA4 and PA5 were 20mA true open drain.
New Memory Locations in ST72C334
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20h: MISCR register becomes MISCR1 register (naming change)
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29h: new control/status register for the MCC module
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2Bh: new control/status register for the Clock, Reset and Supply control. This register replaces the
WDGSR register keeping the WDOGF flag compatibility.
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40h: new MISCR2 register
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