M2V28S30ATP-6L datasheet(1/51 Pages) MITSUBISHI

Part #	M2V28S30ATP-6L

Description	128M Synchronous DRAM

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Manufacturer	MITSUBISHI [Mitsubishi Electric Semiconductor]

Direct Link	http://www.mitsubishichips.com

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M2V28S20ATP -6,-6L,-7,-7L,-8,-8L

M2V28S30ATP -6,-6L,-7,-7L,-8,-8L

M2V28S40ATP -6,-6L,-7,-7L,-8,-8L

Nov. '99

MITSUBISHI LSIs

SDRAM (Rev. 1.0E)

128M Synchronous DRAM

(4-BANK x 8,388,608-WORD x 4-BIT)

(4-BANK x 4,194,304-WORD x 8-BIT)

(4-BANK x 2,097,152-WORD x 16-BIT)

MITSUBISHI ELECTRIC

1

DESCRIPTION

M2V28S20ATP is organized as 4-bank x 8,388,608-word x 4-bit Synchronous DRAM with LVTTL

interface and M2V28S30ATP is organized as 4-bank x 4,194,304-word x 8-bit and M2V28S40ATP is organized

as 4-bank x 2,097,152-word x 16-bit. All inputs and outputs are referenced to the rising edge of CLK.

M2V28S20ATP,M2V28S30ATP,M2V28S40ATP achieves very high speed data rates up to 133MHz,

and is suitable for main memory or graphic memory in computer systems.

FEATURES

- Single 3.3V ±0.3V power supply

- Max. Clock frequency

-6:PC133<3-3-3> / -7:PC100<2-2-2> / -8:PC100<3-2-2>

- Fully synchronous operation referenced to clock rising edge

- 4-bank operation controlled by BA0,BA1(Bank Address)

- /CAS latency- 2/3 (programmable)

- Burst length- 1/2/4/8/FP (programmable)

- Burst type- Sequential and interleave burst (programmable)

- Byte Control- DQML and DQMU (M2V28S40ATP)

- Random column access

- Auto precharge / All bank precharge controlled by A10

- Auto and self refresh

- 4096 refresh cycles /64ms

- LVTTL Interface

- Package

M2V28S20ATP/30ATP/40ATP

400-mil, 54-pin Thin Small Outline (TSOP II) with 0.8mm lead pitch

PRELIMINARY

Some of contents are described for general products and are

subject to change without notice.

ITEM

tCLK

M2V28S20/30/40ATP

-7

-8

tRAS

tRCD

tAC

tRC

Icc1

Icc6

Clock Cycle Time

(Min.)

Active to Precharge Command Period

(Min.)

Row to Column Delay

(Min.)

Access Time from CLK

(Max.) (CL=3)

Ref/Active Command Period

(Min.)

Operation Current

(Max.)

(Single Bank)

Self Refresh Current

(Max.)

10ns

50ns

20ns

6ns

70ns

2mA

10ns

50ns

20ns

6ns

70ns

2mA

V28S20

V28S30

V28S40

-6

7.5ns

45ns

20ns

5.4ns

67.5ns

2mA

110mA

100mA

120mA

100mA

120mA

100mA

95mA

130mA

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M2V28S30ATP-6L Datasheet(PDF) 1 Page - Mitsubishi Electric Semiconductor

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