Sep.'99 Preliminary

MITSUBISHI LSIs

MITSUBISHI

ELECTRIC

DDR SDRAM (Rev.0.0)

M2S56D20/ 30 TP

256M Double Data Rate Synchronous DRAM

11

Current State

CKE

n-1

CKE

n

/CS /RAS /CAS /WE

Add

Action

SELF-

REFRESH

H

X

X

X

X

X

X

INVALID

L

H

H

X

X

X

X

Exit Self-Refresh (Idle after tRC)

L

H

L

H

H

H

X

Exit Self-Refresh (Idle after tRC)

L

H

L

H

H

L

X

ILLEGAL

L

H

L

H

L

X

X

ILLEGAL

L

H

L

L

X

X

X

ILLEGAL

L

L

X

X

X

X

X

NOP (Maintain Self-Refresh)

POWER

DOWN

H

X

X

X

X

X

X

INVALID

L

H

X

X

X

X

X

Exit Power Down to Idle

L

L

X

X

X

X

X

NOP (Maintain Self-Refresh)

ALL BANKS

IDLE

H

H

X

X

X

X

X

Refer to Function Truth Table

H

L

L

L

L

H

X

Enter Self-Refresh

H

L

H

X

X

X

X

Enter Power Down

H

L

L

H

H

H

X

Enter Power Down

H

L

L

H

H

L

X

ILLEGAL

H

L

L

H

L

X

X

ILLEGAL

H

L

L

L

X

X

X

ILLEGAL

L

X

X

X

X

X

X

Refer to Current State =Power Down

ANY STATE

other than

listed above

H

H

X

X

X

X

X

Refer to Function Truth Table

H

L

X

X

X

X

X

Begin CLK Suspend at Next Cycle

L

H

X

X

X

X

X

Exit CLK Suspend at Next Cycle

L

L

X

X

X

X

X

Maintain CLK Suspend

FUNCTION TRUTH TABLE for CKE

ABBREVIATIONS:

H=High Level, L=Low Level, X=Don't Care

NOTES:

1. CKE Low to High transition will re-enable CLK and other inputs asynchronously. A minimum setup time must be

satisfied before any command other than EXIT.

2. Power-Down and Self-Refresh can be entered only from the All Banks Idle State.

3. Must be legal command.

Notes

3

3

2

2

2

2

2

2

2

2

1

1

1

1

1

1

1