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M2V56S20AKT-7 Datasheet(PDF) 10 Page - Mitsubishi Electric Semiconductor |
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M2V56S20AKT-7 Datasheet(HTML) 10 Page - Mitsubishi Electric Semiconductor |
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10 / 49 page  July '01 MITSUBISHI LSIs MITSUBISHI ELECTRIC SDRAM (Rev.1.01) Single Data Rate M2V56S20/ 30/ 40 AKT -5, -6, -7 256M Synchronous DRAM 10 FUNCTION TRUTH TABLE (continued) Current State /CS /RAS /CAS /WE Address Command Action RE- FRESHING H X X X X DESEL NOP (Idle after tRC) L H H H X NOP NOP (Idle after tRC) L H H L X TBST ILLEGAL L H L X BA, CA, A10 READ / WRITE ILLEGAL L L H H BA, RA ACT ILLEGAL L L H L BA, A10 PRE / PREA ILLEGAL L L L H X REFA ILLEGAL L L L L Op-Code, Mode-Add MRS ILLEGAL MODE REGISTER SETTING H X X X X DESEL NOP (Idle after tRSC) L H H H X NOP NOP (Idle after tRSC) L H H L X TBST ILLEGAL L H L X BA, CA, A10 READ / WRITE ILLEGAL L L H H BA, RA ACT ILLEGAL L L H L BA, A10 PRE / PREA ILLEGAL L L L H X REFA ILLEGAL L L L L Op-Code, Mode-Add MRS ILLEGAL ABBREVIATIONS: H=High Level, L=Low Level, X=Don't Care BA=Bank Address, RA=Row Address, CA=Column Address, NOP=No OPeration NOTES: 1. All entries assume that CKE was High during the preceding clock cycle and the current clock cycle. 2. ILLEGAL to bank in specified state; function may be legal in the bank indicated by BA, depending on the state of that bank. 3. Must satisfy bus contention, bus turn around, write recovery requirements. 4. NOP to bank precharging or in idle state. May precharge bank indicated by BA. 5. ILLEGAL if any bank is not idle. ILLEGAL = Device operation and/or data-integrity are not guaranteed. |
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