M2V28S20ATP-8L datasheet(2/51 Pages) MITSUBISHI

Part #	M2V28S20ATP-8L

Description	128M Synchronous DRAM

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Manufacturer	MITSUBISHI [Mitsubishi Electric Semiconductor]

Direct Link	http://www.mitsubishichips.com

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M2V28S20ATP -6,-6L,-7,-7L,-8,-8L

M2V28S30ATP -6,-6L,-7,-7L,-8,-8L

M2V28S40ATP -6,-6L,-7,-7L,-8,-8L

Nov. '99

MITSUBISHI LSIs

SDRAM (Rev. 1.0E)

128M Synchronous DRAM

(4-BANK x 8,388,608-WORD x 4-BIT)

(4-BANK x 4,194,304-WORD x 8-BIT)

(4-BANK x 2,097,152-WORD x 16-BIT)

MITSUBISHI ELECTRIC

2

PIN CONFIGURATION (TOP VIEW)

M2V28S30ATP

M2V28S40ATP

PIN CONFIGURATION

(TOP VIEW)

1

2

3

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11

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23

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25

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28

Vdd

DQ0

VddQ

DQ1

DQ2

VssQ

DQ3

DQ4

VddQ

DQ5

DQ6

VssQ

DQ7

Vdd

DQML

/WE

/CAS

/RAS

/CS

BA0(A13)

BA1(A12)

A10(AP)

A2

A3

Vdd

A0

A1

Vss

DQ15

VssQ

DQ14

DQ13

VddQ

DQ12

DQ11

VssQ

DQ10

DQ9

VddQ

DQ8

Vss

NC

DQMU

CLK

CKE

NC

A11

A8

A7

A6

A5

A4

Vss

A9

Vdd

DQ0

VddQ

NC

DQ1

VssQ

NC

DQ2

VddQ

NC

DQ3

VssQ

NC

Vdd

NC

/WE

/CAS

/RAS

/CS

BA0(A13)

BA1(A12)

A10(AP)

A2

A3

Vdd

A0

A1

Vdd

NC

VddQ

NC

DQ0

VssQ

NC

VddQ

NC

DQ1

VssQ

NC

Vdd

NC

/WE

/CAS

/RAS

/CS

BA0(A13)

BA1(A12)

A10(AP)

A2

A3

Vdd

A0

A1

Vss

DQ7

VssQ

NC

DQ6

VddQ

NC

DQ5

VssQ

NC

DQ4

VddQ

NC

Vss

NC

DQM

CLK

CKE

NC

A11

A8

A7

A6

A5

A4

Vss

A9

Vss

NC

VssQ

NC

DQ3

VddQ

NC

VssQ

NC

DQ2

VddQ

NC

Vss

NC

DQM

CLK

CKE

NC

A11

A8

A7

A6

A5

A4

Vss

A9

M2V28S20ATP

CLK

: Master Clock

CKE

: Clock Enable

/CS

: Chip Select

/RAS

: Row Address Strobe

/CAS

: Column Address Strobe

/WE

: Write Enable

DQ0-15

: Data I/O

DQM

: Output Disable/ Write Mask

A0-11

: Address Input

BA0,1

: Bank Address

Vdd

: Power Supply

VddQ

: Power Supply for Output

Vss

: Ground

VssQ

: Ground for Output

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M2V28S20ATP-8L Datasheet(PDF) 2 Page - Mitsubishi Electric Semiconductor

M2V28S20ATP-8L Datasheet(HTML) 2 Page - Mitsubishi Electric Semiconductor

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