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M34512M2-XXXFP Datasheet(PDF) 10 Page - Mitsubishi Electric Semiconductor |
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M34512M2-XXXFP Datasheet(HTML) 10 Page - Mitsubishi Electric Semiconductor |
10 / 80 page 10 4512 Group SINGLE-CHIP 4-BIT CMOS MICROCOMPUTER MITSUBISHI MICROCOMPUTERS PRELIMINAR Y Notice: This is not a final specification. Some parametric limits are subject to change. (8) Program counter (PC) Program counter (PC) is used to specify a ROM address (page and address). It determines a sequence in which instructions stored in ROM are read. It is a binary counter that increments the number of instruction bytes each time an instruction is executed. However, the value changes to a specified address when branch instructions, subroutine call instructions, return instructions, or the table refer- ence instruction (TABP p) is executed. Program counter consists of PCH (most significant bit to bit 7) which specifies to a ROM page and PCL (bits 6 to 0) which speci- fies an address within a page. After it reaches the last address (address 127) of a page, it specifies address 0 of the next page (Figure 7). Make sure that the PCH does not specify after the last page of the built-in ROM. (9) Data pointer (DP) Data pointer (DP) is used to specify a RAM address and consists of registers Z, X, and Y. Register Z specifies a RAM file group, reg- ister X specifies a file, and register Y specifies a RAM digit (Figure 8). Register Y is also used to specify the port D bit position. When using port D, set the port D bit position to register Y certainly and execute the SD, RD, or SZD instruction (Figure 9). Fig. 7 Program counter (PC) structure Fig. 8 Data pointer (DP) structure Fig. 9 SD instruction execution example Z1 Z0 X3 X2 X1 X0 Y3 Y2 Y1 Y0 Data pointer (DP) Register Z (2) Register X (4) Register Y (4) Specifying RAM digit Specifying RAM file Specifying RAM file group 01 01 1 D7 Set Specifying bit position Port D output latch Register Y (4) D5 D6 D4 D0 p5 p4 p3 p2 p1 p0 a6 a5 a4 a3 a2 a1 a0 Program counter PCH Specifying page PCL Specifying address p6 |
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