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IL710-2 Datasheet(PDF) 3 Page - List of Unclassifed Manufacturers |
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IL710-2 Datasheet(HTML) 3 Page - List of Unclassifed Manufacturers |
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3 / 8 page  NVE Corporation 11409 Valley View Road Eden Prairie, MN 55344-3617 USA Telephone: (952) 829-9217 Fax: (952) 829-9189 Internet: www.isoloop.com Electrical Specifications Electrical Specifications are Tmin to Tmax unless otherwise stated. Parameter Symbol 3.0-3.6 V Specifications 4.5-5.5 V Specifications Units Test Conditions DC Specifications Min. Typ. Max. Min. Typ. Max. Input Quiescent Supply Current IDD1 810 10 15 µA Output Quiescent Supply Current IDD2 3.3 4 5 6 mA Logic Input Current II -10 10 -10 10 µA Logic High Output Voltage VOH VDD2-0.1 VDD2 VDD2-0.1 VDD2 V IO =-20 µA, VI =VIH 0.8*VDD2 VDD2-0.5 0.8*VDD2 VDD2-0.5 IO = -4 mA, VI =VIH Logic Low Output Voltage VOL 0 0.1 0 0.1 V IO = 20 µA, VI =VIL 0.5 0.8 0.5 0.8 IO = 4 mA, VI =VIL Switching Specifications Dynamic Current Consumption(6) 300 420 500 640 µA/MHz Maximum Data Rate 100 110 100 110 MBd CL = 15 pF Pulse Width PW 10 10 ns Propagation Delay Input to Output (High to Low) tPHL 12 18 10 15 ns CL = 15 pF Propagation Delay Input to Output (Low to High) tPLH 12 18 10 15 ns CL = 15 pF Propagation Delay Enable to Output (High to High Impedance) tPHZ 35 3 5 ns CL = 15 pF Propagation Delay Enable to Output (Low to High Impedance) tPLZ 35 3 5 ns CL = 15 pF Propagation Delay Enable to Output (High Impedance to High) tPZH 35 3 5 ns CL = 15 pF Propagation Delay Enable to Output (High Impedance to Low) tPZL 35 3 5 ns CL = 15 pF Pulse Width Distortion(2) 23 2 3 Propagation Delay Skew(3) tPSK 4 6 4 6 ns CL = 15 pF Output Rise Time (10-90%) tR 2 4 1 3 ns CL = 15 pF Output Fall Time (10-90%) tF 2 4 1 3 ns CL = 15 pF Common Mode Transient |CMH| Immunity (Output Logic High or 20 30 20 30 kV/ µs Vcm = 300V Logic Low) (4) |CML| IL710TISOLOOP® 3 Notes: 1. Absolute Maximum ambient operating temperature means the device will not be damaged if operated under these conditions. It does not guarantee performance. 2. PWD is defined as | t PHL - tPLH |. %PWD is equal to the PWD divided by the pulse width. 3. t PSK is equal to the magnitude of the worst case difference in tPHL and/or t PLH that will be seen between units at 25 O C. 4. CM H is the maximum common mode voltage slew rate that can be sustained while maintaining VO > 0.8 VDD2. CML is the maximum common mode input voltage that can be sustained while maintaining VO < 0.8 V. The common mode voltage slew rates apply to both rising and falling common mode voltage edges. 5. Device is considered a two terminal device: pins 1-4 shorted and pins 5-8 shorted. 6. Dynamic current is consumed on the VDD1 supply only. |
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