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74VHC86MTR Datasheet(PDF) 1 Page - STMicroelectronics |
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74VHC86MTR Datasheet(HTML) 1 Page - STMicroelectronics |
1 / 8 page 74VHC86 QUAD EXCLUSIVE OR GATE PRELIMINARY DATA ® June 1999 s HIGH SPEED: tPD = 4.8 ns (TYP.) at VCC =5V s LOW POWER DISSIPATION: ICC =2 µA (MAX.) at TA =25 oC s HIGH NOISE IMMUNITY: VNIH =VNIL =28% VCC (MIN.) s POWER DOWN PROTECTION ON INPUTS s SYMMETRICAL OUTPUT IMPEDANCE: |IOH|=IOL = 8 mA (MIN) s BALANCED PROPAGATION DELAYS: tPLH ≅ tPHL s OPERATING VOLTAGE RANGE: VCC (OPR) = 2V to 5.5V s PIN AND FUNCTION COMPATIBLE WITH 74 SERIES 86 s IMPROVED LATCH-UP IMMUNITY s LOW NOISE: VOLP = 0.8V (Max.) DESCRIPTION The 74VHC86 is an advanced high-speed CMOS QUAD EXCLUSIVE OR GATE fabricated with sub-micron silicon gate and double-layer metal wiring C 2MOS technology. Power down protection is provided on all inputs and 0 to 7V can be accepted on inputs with no regard to the supply voltage. This device can be used to interface 5V to 3V. All inputs and outputs are equipped with protection circuits against static discharge, giving them 2KV ESD immunity and transient excess voltage. PIN CONNECTION AND IEC LOGIC SYMBOLS ORDER CODES : 74VHC86M 74VHC86T M (Micro Package) T (TSSOP Package) 1/8 |
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