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MH4M365CNXJ-6 Datasheet(PDF) 6 Page - Mitsubishi Electric Semiconductor |
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MH4M365CNXJ-6 Datasheet(HTML) 6 Page - Mitsubishi Electric Semiconductor |
6 / 15 page MITSUBISHI ELECTRIC HYPER PAGE MODE 150994944-BIT ( 4194304-WORD BY 36-BIT ) DYNAMIC RAM MITSUBISHI LSIs MH4M365CXJ/CNXJ-5,-6,-7 Nov.8.96 ( / 15 ) MIT-DS-0086-1.1 Write Cycle (Early Write) Parameter Write cycle time RAS low pulse width CAS low pulse width Symbol 8 CAS hold time after RAS low Write setup time before CAS low Write hold time after CAS low 0 RAS hold time after CAS low 10000 10000 10000 10000 90 50 8 40 13 8 0 10 0 110 60 10 48 15 10 0 8 10 Data setup time before CAS low or W low Data hold time after CAS low or W low Write pulse width ns ns ns ns ns ns ns Limits Unit Min Max Min Max ns ns Min Max 10000 10000 13 0 130 70 13 55 20 13 0 13 ns tWC tRAS tCAS tCSH tRSH tWCS tWCH tWP tDS tDH MH4M365C -5 MH4M365C -6 MH1M365C -7 6 Note 24: Eight or more CAS before RAS cycles instead of eight RAS cycles are necessary for proper operation of CAS before RAS refresh mode. CAS before RAS Refresh Cycle (Note 24) Limits Min Max Parameter CAS setup time before RAS low Symbol tCSR Unit Min Max Min Max ns ns tCHR 5 10 CAS hold time after RAS low 5 10 5 15 Hyper page Mode Cycle (Read, Early Write, Hi-Z control by W) (Note 21) Note 21: All previously specified timing requirements and switching characteristics are applicable to their respective Hyper page mode cycle. 22: tRAS(min) is specified as two cycles of CAS input are performed. 23: tCP(max) is specified as a reference point only. Parameter Hyper page mode read/write cycle time RAS low pulse width for read write cycle CAS high pulse width Symbol RAS hold time after CAS precharge (Note22) (Note23) W Pulse Width (Hi-Z control) Output hold time from CAS low 28 20 65 8 100000 33 25 77 10 100000 13 16 7 7 ns ns ns ns Limits Unit Min Max Min Max ns Min Max 38 30 92 13 100000 16 7 ns 5 5 5 tHPC tDOH tRAS tCP tCPRH tWPE MH1M365C -5 MH1M365C -6 MH1M365C -7 MH4M365C -5 MH4M365C -6 MH4M365C -7 |
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