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LMH7220 Datasheet(PDF) 4 Page - National Semiconductor (TI) |
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LMH7220 Datasheet(HTML) 4 Page - National Semiconductor (TI) |
4 / 19 page +5V DC Electrical Characteristics (Continued) Unless otherwise specified, all limits guaranteed for T J = 25˚C, VCM = 300 mV, −50 mV < VID < +50 mV and RL = 100 Ω. Boldface limits apply at the temperature extremes. (Note 6) Symbol Parameter Conditions Min (Note 6) Typ (Note 5) Max (Note 6) Units I S Supply Current Load Current Excluded V IN Differential = 50 mV 6.8 9 12.6 mA +5V AC Electrical Characteristics Unless otherwise specified, all limits guaranteed for T J = 25˚C, VCM = 300 mV, −50 mV < VID < +50 mV and RL = 100 Ω. Boldface limits apply at the temperature extremes. (Note 6) Symbol Parameter Conditions Min (Note 6) Typ (Note 5) Max (Note 6) Units TR Toggle Rate Overdrive = ±50 mV; C L =2pF @ 50% Output Swing 750 940 Mb/s t PDLH Propagation Delay t PDLH =(tPDH +tPDL )/2 (see figure 3 application note) Input SR = Constant V ID start value = -100mV Overdrive 20 mV 3.63 ns Overdrive 50 mV 3.09 Overdrive 100 mV 2.9 7 Overdrive 1V 2.41 t OD-disp Input Overdrive Dispersion @Overdrive 20 - 100 mV 0.79 ns @Overdrive 100 mV - 1V 0.43 t SR-disp Input Slew Rate Dispersion 0.05 V/ns to 1 V/ns Overdrive 100 mV 0.20 ns t CM-disp Input Common Mode Dispersion SR = 4 V/ns; Overdrive 100 mV V CM =0to3V 0.21 ns ∆t PDLH Q to Q Time Skew |t PDH -tPDL | (Note 8) Overdrive = 100 mV; C L = 2 pF 0.09 ns ∆t PDHL Q to Q Time Skew |t PDL -tPDH | (Note 8) Overdrive = 100 mV; C L = 2 pF 0.07 ns t r Output Rise Time (20% - 80%) (Note 9) Overdrive = 100 mV; C L = 2 pF 0.59 ns t f Output Fall Time (20% - 80%) (Note 9) Overdrive = 100 mV; C L = 2 pF 0.55 ns +2.7V DC Electrical Characteristics Unless otherwise specified, all limits guaranteed for T J = 25˚C, VCM = 300 mV, −50 mV < VID < +50 mV and RL = 100 Ω. Boldface limits apply at the temperature extremes. (Note 6) Symbol Parameter Conditions Min (Note 6) Typ (Note 5) Max (Note 6) Units I B Input Bias Current V IN Differential = 0 −5 −7 −1.3 −0.5 µA I OS Input Offset Current V IN Differential = 0 −500 +500 nA TC I OS Input Offset Current TC V IN Differential = 0 ±2 nA/˚C V OS Input Offset Voltage −9.5 +9.5 mV TC V OS Input Offset Voltage TC ± 50 µV/˚C VRI Input Voltage Range CMRR > 50 dB −0.2 V CC−2 V CMRR Common-Mode Rejection Ratio V CM =0toVCC−2.2V 56 70 dB PSRR Power Supply Rejection Ratio 63 74 dB A V Open Loop Gain 59 dB V O Output Offset Voltage V IN Differential = 50 mV 1125 1213 1325 mV ∆V O V O Change Between ‘0’ and ‘1’ V IN Differential = ± 50 mV −25 +25 mV www.national.com 4 |
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