IDT7014S

High-Speed 4K x 9 Dual-Port Static RAM

Industrial and Commercial Temperature Ranges

8

Truth Table I – Read/Write Control

Functional Description

The IDT7014 provides two ports with separate control, address,

and I/O pins that permit independent access for reads or writes to

any location in memory. It lacks the chip enable feature of CMOS Dual

Ports, thus it operates in active mode as soon as power is applied. Each

port has its own Output Enable control (

OE).Inthereadmode,theport’s

OEturnsontheoutputdriverswhensetLOW. Theuserapplicationshould

avoidsimultaneouswriteoperationstothesamememorylocation.There

is no on-chip arbitration circuitry to resolve write priority and partial data

from both ports may be written. READ/WRITE conditions are illustrated

in Table 1.

NOTE:

'H' = HIGH,'L' = LOW, 'X' = Don’t Care, and 'Z' = HIGH Impedance.

2528 drw 10

R/

W

ADDRESS

OE

(5)

(4)

(3)

(3)

R/

WOE

Function

Data written into memory

HL

Data in memory output on port

X

H

Z

High-impedance outputs

2528 tbl 10

NOTES:

1. R/

W must be HIGH during all address transitions.

W going HIGH to the end of write cycle.

3. During this period, the I/O pins are in the output state, and input signals must not be applied.

4. Transition is measured 0mV from the Low or High-impedance voltage with the Output Test Load (Figure 2).

5. If

OE is HIGH during an R/W controlled write cycle, this requirement does not apply and the write pulse can be as short as