MC74LVX259DR2 datasheet(1/11 Pages) ONSEMI

Part #	MC74LVX259DR2

Description	8-Bit Addressable Latch/1-of-8 Decoder CMOS Logic Level Shifter

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Manufacturer	ONSEMI [ON Semiconductor]

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April, 2001 – Rev. 1

1

Publication Order Number:

MC74LVX259/D

MC74LVX259

8-Bit Addressable

Latch/1-of-8 Decoder

CMOS Logic Level Shifter

with LSTTL–Compatible Inputs

The MC74LVX259 is an 8–bit Addressable Latch fabricated with

silicon gate CMOS technology.

The internal circuit is composed of three stages, including a buffer

output which provides high noise immunity and stable output.

The LVX259 is designed for general purpose storage applications in

digital systems. The device has four modes of operation as shown in

the mode selection table.. In the addressable latch mode, the data on

Data In is written into the addressed latch. The addressed latch follows

the data input with all non–addressed latches remaining in their

previous states. In the memory mode, all latches remain in their

previous state and are unaffected by the Data or Address inputs. In the

one–of–eight decoding or demultiplexing mode, the addressed output

follows the state of Data In with all other outputs in the LOW state. In

the Reset mode, all outputs are LOW and unaffected by the address

and data inputs. When operating the LVX259 as an addressable latch,

changing more than one bit of the address could impose a transient

wrong address. Therefore, this should only be done while in the

memory mode.

The MC74LVX259 input structure provides protection when

voltages up to 7 V are applied, regardless of the supply voltage. This

allows the MC74LVX259 to be used to interface 5 V circuits to 3 V

circuits.

• High Speed: t

PD = 7.0 ns (Typ) at VCC = 3.3 V

• Low Power Dissipation: I

CC = 2 µA (Max) at TA = 25°C

• High Noise Immunity: V

NIH = VNIL = 28% VCC

• CMOS–Compatible Outputs: V

OH > 0.8 VCC; VOL < 0.1 VCC @Load

• Power Down Protection Provided on Inputs and Outputs

• Balanced Propagation Delays

• Pin and Function Compatible with Other Standard Logic Families

• Latchup Performance Exceeds 300 mA

• ESD Performance: HBM > 2000 V; Machine Model > 200 V

http://onsemi.com

ORDERING INFORMATION

SOIC–16

D SUFFIX

CASE 751B

TSSOP–16

DT SUFFIX

CASE 948F

SOIC EIAJ–16

M SUFFIX

CASE 966

MARKING DIAGRAMS

LVX259

AWLYYWW

LVX

259

AWLYWW

LVX259

ALYW

Device

Package

Shipping

MC74LVX259D

SO–16

48 Units/Rail

MC74LVX259DR2

SO–16

2500 Units/Reel

MC74LVX259DT

TSSOP–16

96 Units/Rail

TSSOP–16 2000 Units/Reel

MC74LVX259M

SO EIAJ–16

48 Units/Rail

MC74LVX259MEL

SO EIAJ–16 2000 Units/Reel

MC74LVX259DTR2

A

= Assembly Location

WL or L

= Wafer Lot

YY or Y

= Year

WW or W = Work Week

1

8

9

16

1

8

16

9

1

16

9

8

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