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MC74LVX50DR2G Datasheet(PDF) 5 Page - ON Semiconductor |
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MC74LVX50DR2G Datasheet(HTML) 5 Page - ON Semiconductor |
5 / 10 page MC74LVX50 http://onsemi.com 5 Figure 3. Switching Waveforms VCC GND 50% 50% VCC A Y tPHL tPLH *Includes all probe and jig capacitance Figure 4. Test Circuit CL* TEST POINT DEVICE UNDER TEST OUTPUT Figure 5. Input Equivalent Circuit INPUT EMBOSSED CARRIER DIMENSIONS (See Notes 9 and 10) Tape Size B1 Max D D1 E F K P P0 P2 R T W 8 mm 4.35 mm (0.179”) 1.5 mm + 0.1 −0.0 (0.059” 0 004 1.0 mm Min (0.179”) 1.75 mm ±0.1 (0.069 ±0.004”) 3.5 mm ±0.5 (1.38 ±0.002”) 2.4 mm Max (0.094”) 4.0 mm ±0.10 (0.157 ±0.004”) 4.0 mm ±0.1 (0.157 ±0.004”) 2.0 mm ±0.1 (0.079 ±0.004”) 25 mm (0.98”) 0.6 mm (0.024) 8.3 mm (0.327) 12 mm 8.2 mm (0.323”) ( +0.004 −0.0) 1.5 mm Min (0.060) ) 5.5 mm ±0.5 (0.217 ±0.002”) 6.4 mm Max (0.252”) 4.0 mm ±0.10 (0.157 ±0.004”) 8.0 mm ±0.10 (0.315 ±0.004”) ) ) 30 mm (1.18”) 12.0 mm ±0.3 (0.470 ±0.012”) 16 mm 12.1 mm (0.476”) 7.5 mm ±0.10 (0.295 ±0.004”) 7.9 mm Max (0.311”) 4.0 mm ±0.10 (0.157 ±0.004”) 8.0 mm ±0.10 (0.315 ±0.004”) 12.0 mm ±0.10 (0.472 ±0.004”) 16.3 mm (0.642) 24 mm 20.1 mm (0.791”) 11.5 mm ±0.10 (0.453 ±0.004”) 11.9 mm Max (0.468”) 16.0 mm ±0.10 (0.63 ±0.004”) 24.3 mm (0.957) 9. Metric Dimensions Govern−English are in parentheses for reference only. 10. A0, B0, and K0 are determined by component size. The clearance between the components and the cavity must be within 0.05 mm min to 0.50 mm max. The component cannot rotate more than 10 ° within the determined cavity |
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