Philips Semiconductors

Product specification

80C451/83C451/87C451

80C51 8-bit microcontroller family

4K/128 OTP/ROM/ROMless, expanded I/O

1998 May 01

5

PIN DESCRIPTION

MNEMONIC

PIN

NO.

TYPE

NAME AND FUNCTION

54

I

Ground: 0V reference.

18

I

Power Supply: This is the power supply voltage for normal, idle, and power-down operation.

P0.0–0.7

17-10

I/O

Port 0: Port 0 is an open-drain, bidirectional I/O port. Port 0 is also the multiplexed data and low-order

address bus during accesses to external memory. External pull-ups are required during program

verification. Port 0 can sink/source eight LS TTL inputs.

P1.0–P1.7

27-34

I/O

Port 1: Port 1 is an 8-bit bidirectional I/O port with internal pull-ups. Port 1 receives the low-order

address bytes during program memory verification. Port 1 can sink/source three LS TTL inputs, and

drive CMOS inputs without external pull-ups.

P2.0–P2.7

2-9

I/O

Port 2: Port 2 is an 8-bit bidirectional I/O port with internal pull-ups. Port 2 emits the high-order address

bytes during access to external memory and receives the high-order address bits and control signals

during program verification. Port 2 can sink/source three LS TTL inputs, and drive CMOS inputs without

external pull-ups.

P3.0–P3.7

36-43

I/O

Port 3: Port 3 is an 8-bit bidirectional I/O port with internal pull-ups. Port 3 can sink/source three LS

TTL inputs, and drive CMOS inputs without external pull-ups. Port 3 also serves the special functions

listed below:

36

I

RxD (P3.0): Serial input port

37

O

TxD (P3.1): Serial output port

38

I

INT0 (P3.2): External interrupt

39

I

INT1 (P3.3): External interrupt

40

I

T0 (P3.4): Timer 0 external input

41

I

T1 (P3.5): Timer 1 external input

42

O

WR (P3.6): External data memory write strobe

43

O

RD (P3.7): External data memory read strobe

P4.0–P4.7

26-19

I/O

Port 4: Port 4 is a 8-bit (LCC) bidirectional I/O port with internal pull-ups. Port 4 can sink/source three

LS TTL inputs and drive CMOS inputs without external pull-ups.

P5.0–P5.7

44-51

I/O

Port 5: Port 5 is a 8-bit (LCC) bidirectional I/O port with internal pull-ups. Port 5 can sink/source three

LS TTL inputs and drive CMOS inputs without external pull-ups.

P6.0–P6.7

59-66

I/O

Port 6: Port 6 is a specialized 8-bit bidirectional I/O port with internal pull-ups. This special port can

sink/source three LS TTL inputs and drive CMOS inputs without external pull-ups. Port 6 can be used in

a strobed or non-strobed mode of operation. Port 6 works in conjunction with four control pins that

serve the functions listed below:

ODS

55

I

ODS: Output data strobe

IDS

56

I

IDS: Input data strobe

BFLAG

57

I/O

BFLAG: Bidirectional I/O pin with internal pull-ups

AFLAG

58

I/O

AFLAG: Bidirectional I/O pin with internal pull-ups

RST

35

I

Reset: A high on this pin for two machine cycles while the oscillator is running, resets the device. An

ALE/PROG

68

I/O

Address Latch Enable/Program Pulse: Output pulse for latching the low byte of the address during

an access to external memory. ALE is activated at a constant rate of 1/6 the oscillator frequency except

during an external data memory access, at which time one ALE is skipped. ALE can sink/source three

LS TTL inputs and drive CMOS inputs without external pull-ups. This pin is also the program pulse

during EPROM programming.

PSEN

67

O

Program Store Enable: The read strobe to external program memory. PSEN is activated twice each

machine cycle during fetches from external program memory. However, when executing out of external

program memory, two activations of PSEN are skipped during each access to external program

memory. PSEN is not activated during fetches from internal program memory. PSEN can sink/source

eight LS TTL inputs and drive CMOS inputs without an external pull-up. This pin should be tied low

during programming.

1

I

Instruction Execution Control/Programming Supply Voltage: When EA is held high, the CPU

executes out of internal program memory, unless the program counter exceeds 0FFFH. When EA is

held low, the CPU executes out of external program memory. EA must never be allowed to float. This

XTAL1

53

I

Crystal 1: Input to the inverting oscillator amplifier that forms the oscillator. This input receives the

external oscillator when an external oscillator is used.

XTAL2

52

O

Crystal 2: An output of the inverting amplifier that forms the oscillator. This pin should be floated when

an external oscillator is used.