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P87C528EBPN Datasheet(PDF) 11 Page - NXP Semiconductors

Part # P87C528EBPN
Description  80C51 8-bit microcontrollers 16K/32K, 512 OTP, I2C, watchdog timer
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Manufacturer  PHILIPS [NXP Semiconductors]
Direct Link  http://www.nxp.com
Logo PHILIPS - NXP Semiconductors

P87C528EBPN Datasheet(HTML) 11 Page - NXP Semiconductors

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Philips Semiconductors
Product specification
87C524/87C528
80C51 8-bit microcontrollers
16K/32K, 512 OTP, I2C, watchdog timer
1999 Jul 23
11
DC ELECTRICAL CHARACTERISTICS
Tamb = 0°C to +70°C (VDD = 5 V ±10%), –40°C to +85°C (VDD = 5 V ±10%), VSS=0 V
TEST
LIMITS
SYMBOL
PARAMETER
PART TYPE
CONDITIONS
MIN
MAX
UNIT
VIL
Input low voltage,
except EA, P1.6/SCL, P1.7/SDA
0
°C to 70°C
–40
°C to +85°C
–0.5
–0.5
0.2VCC–0.1
0.2VCC–0.15
V
V
VIL1
Input low voltage to EA
0
°C to 70°C
–40
°C to +85°C
0
0
0.2VCC–0.3
0.2VCC–0.35
V
V
VIL2
Input low voltage to P1.6/SCL, P1.7/SDA5
–0.5
0.3 V
V
VIH
Input high voltage,
except XTAL1, RST, P1.6/SCL, P1.7/SDA
0
°C to 70°C
–40
°C to +85°C
0.2VCC+0.9
0.2VCC+1.0
VCC+0.5
VCC+0.5
V
V
VIH1
Input high voltage, XTAL1, RST
0
°C to 70°C
–40
°C to +85°C
0.7VCC
0.7VCC+0.1
VCC+0.5
VCC+0.5
V
V
VIH2
Input high voltage, P1.6/SCL, P1.7/SDA5
3.0
6.0
V
VOL
Output low voltage, ports 1, 2, 3, except
P1.6/SCL, P1.7/SDA1
IOL = 1.6 mA1
0.45
V
VOL1
Output low voltage, port 0, ALE, PSEN1
IOL = 3.2 mA1
0.45
V
VOL2
Output low voltage, P1.6/SCL, P1.7/SDA
IOL = 3.0 mA1
0.4
V
VOH
Output high voltage, ports 1, 2, 3
IOH = –60 µA
IOH = –25 µA
2.4
0.75VCC
V
V
VOH1
Output high voltage, Port 0 in external bus mode,
ALE, PSEN, RST
IOH = –800 µA
IOH = –300 µA
2.4
0.75VCC
V
V
IIL
Logical 0 input current, ports 1, 2, 3,
except P1.6/SCL, P1.7/SDA
0
°C to 70°C
–40
°C to +85°C
VIN = 0.45 V
–50
–75
µA
µA
ITL
Logical 1-to-0 transition current, ports 1, 2, 3,
except P1.6/SCL, P1.7/SDA
0
°C to 70°C
–40
°C to +85°C
See Note 3
–650
–750
µA
µA
IIL1
Input leakage current, port 0
VIN = VIL or VIH
±10
µA
IIL2
Input leakage current, P1.6/SCL, P1.7/SDA
0 V<Vi<6.0 V
0 V<VCC<6.0 V
±10
µA
µA
ICC
Power supply current:
See Note 4
Active mode @ 16 MHz
0oC to 70oC
–40oC to +85oC
25
35
mA
Idle mode @ 16 MHz
0oC to 70oC
–40oC to +85oC
5
6
mA
Power down mode
50
µA
RRST
Internal reset pull-down resistor
50
300
k
CIO
Pin Capacitance
10
pF
NOTES:
1. Capacitive loading on Port 0 and Port 2 may cause spurious noise pulses to be superimposed on the VOLs of ALE and ports 1 and 3. The
noise is due to external bus capacitance discharging into the port and port 2 pins when these pins make 1-to-0 transactions during bus
operations. In the worst cases (capacitive loading > 100pF), the noise pulse on the ALE pin may exceed 0.8V. In such cases, it may be
desirable to qualify ALE with a Schmitt Trigger, or use an address latch with a Schmitt Trigger STROBE input. Under steady state
(non-transient) conditions, IOL must be externally limited as follows: 10 mA per port pin, port 0 total (all bits) 26 mA, ports 1, 2, and total each
(all bits) 15 mA.
2. Capacitive loading on Ports 0 and 2 may cause the VOH on ALE and PSEN to momentarily fall below the 0.9VCC specification when the
address bits are stabilizing.
3. Pins of ports 1, 2, and 3 source a transition current when they are being externally driven from 1 to 0. The transition current reaches its
maximum value when VIN is approximately 2 V.
4. See Figures 10 through 13 for ICC test conditions.
5. The input threshold voltage of P1.6 and P1.7 (SIO1) meets the I2C specification, so an input voltage below 1.5 V will be recognized as a
logic 0 while an input voltage above 3.0 V will be recognized as a logic 1.


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