Philips Semiconductors

Product specification

83C750/87C750

80C51 8-bit microcontroller family

1K/64 OTP/ROM, low pin count

1998 May 01

10

Programming and Verifying Security Bits

Security bits are programmed employing the same techniques used

to program the USER EPROM and KEY arrays using serial data

streams and logic levels on port pins indicated in Table 3. When

programming either security bit, it is not necessary to provide

address or data information to the 87C750 on ports 1 and 3.

Verification occurs in a similar manner using the RESET serial

stream shown in Table 3. Port 3 is not required to be driven and the

results of the verify operation will appear on ports 1.6 and 1.7.

Ports 1.7 contains the security bit 1 data and is a logical one if

programmed and a logical zero if not programmed. Likewise, P1.6

contains the security bit 2 data and is a logical one if programmed

and a logical zero if not programmed.

Table 3. Implementing Program/Verify Modes

OPERATION

SERIAL CODE

P0.1 (PGM/)

Program user EPROM

296H

Verify user EPROM

296H

Program key EPROM

292H

Verify key EPROM

292H

Program security bit 1

29AH

Program security bit 2

298H

Verify security bits

29AH

NOTE:

EPROM PROGRAMMING AND VERIFICATION

SYMBOL

PARAMETER

MIN

MAX

UNIT

Oscillator/clock frequency

1.2

6

MHz

Address setup to P0.1 (PROG–) low

10

Address hold after P0.1 (PROG–) high

Data setup to P0.1 (PROG–) low

Data setup to P0.1 (PROG–) low

Data hold after P0.1 (PROG–) high

10

µs

10

µs

P0.1 (PROG–) width

90

110

µs

P0.1 (PROG–) high to P0.1 (PROG–) low

10

µs

P0.0 (sync pulse) low

P0.0 (sync pulse) high

ASEL high time

Address hold time

Address setup to ASEL

Low address to valid data

NOTES: