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AD9380KSTZ-150 Datasheet(PDF) 8 Page - Analog Devices |
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AD9380KSTZ-150 Datasheet(HTML) 8 Page - Analog Devices |
8 / 60 page AD9380 Rev. 0 | Page 8 of 60 Pin Type Pin No. Mnemonic Function Value OUTPUTS 92 to 99 RED [7:0] Outputs of Red Converter, Bit 7 is MSB VDD 2 to 9 GREEN [7:0] Outputs of Green Converter, Bit 7 is MSB VDD 12 to 19 BLUE [7:0] Outputs of Blue Converter, Bit 7 is MSB VDD 89 DATACK Data Output Clock VDD 87 HSOUT HSYNC Output Clock (Phase-Aligned with DATACK) VDD 85 VSOUT VSYNC Output Clock (Phase-Aligned with DATACK) VDD 86 SOGOUT SOG Slicer Output VDD 84 O/E FIELD Odd/Even Field Output VDD REFERENCES 57 FILT Connection for External Filter Components For PLL POWER SUPPLY 80, 76, 72, 67, 45, 33 VD Analog Power Supply and DVI Terminators 3.3 V 100, 90, 10 VDD Output Power Supply 1.8 V to 3.3 V 59, 56, 54 PVDD PLL Power Supply 1.8 V 48, 32, 30 DVDD Digital Logic Power Supply 1.8 V GND Ground 0 V CONTROL 82 SCL Serial Port Data Clock 3.3 V CMOS 83 SDA Serial Port Data I/O 3.3 V CMOS HDCP 49 DDCSCL HDCP Slave Serial Port Data Clock 3.3 V CMOS 50 DDCSDA HDCP Slave Serial Port Data I/O 3.3 V CMOS 51 PU2 Should be tied to 3.3 V through a 10 kΩ resistor 3.3 V CMOS 52 PU1 Should be tied to 3.3 V through a 10 kΩ resistor 3.3 V CMOS AUDIO DATA OUTPUTS 28 S/PDIF S/PDIF Digital Audio Output VDD 27 I2S0 I2S Audio (Channel 1, Channel 2) VDD 26 I2S1 I2S Audio (Channel 3, Channel 4) VDD 25 I2S2 I2S Audio (Channel 5, Channel 6) VDD 24 I2S3 I2S Audio (Channel 7, Channel 8) VDD 20 MCLKIN External Reference Audio Clock In VDD 21 MCLKOUT Audio Master Clock Output VDD 22 SCLK Audio Serial Clock Output VDD 23 LRCLK Data Output Clock for Left And Right Audio Channels VDD DIGITAL VIDEO DATA TMDS 34 Rx0− Digital Input Channel 0 Complement TMDS 35 Rx0+ Digital Input Channel 0 True 37 Rx1− Digital Input Channel 1 Complement TMDS 38 Rx1+ Digital Input Channel 1 True 40 Rx2− Digital Input Channel 2 Complement 41 Rx2+ Digital Input Channel 2 True TMDS DIGITAL VIDEO CLOCK INPUTS 43 RxC+ Digital Data Clock True TMDS 44 RxC− Digital Data Clock Complement TMDS DATA ENABLE 88 DE Data Enable 3.3 V CMOS RTERM 46 RTERM Sets Internal Termination Resistance 500 Ω |
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