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TISP4125M3BJ Datasheet(PDF) 3 Page - Bourns Electronic Solutions |
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TISP4125M3BJ Datasheet(HTML) 3 Page - Bourns Electronic Solutions |
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3 / 15 page  JUNE 2001 – REVISED FEBRUARY 2005 Specifications are subject to change without notice. Customers should verify actual device performance in their specific applications. TISP4xxxH3/M3BJ Series for LCAS Protection Electrical Characteristics, TISP4xxxH3, TA = 25 °C (Unless Otherwise Noted) Thermal Characteristics Parameter Test Conditions Min Typ Max Unit IDRM Repetitive peak off- state current VD = VDRM TA = 25 °C TA = 85 °C ±5 ±10 µA V(BO) Breakover voltage dv/dt = ±250 V/ms, R SOURCE = 300 Ω ‘4125 ‘4219 ±125 ±219 V V(BO) Impulse breakover voltage dv/dt ≤ ±1000 V/µs, Linear voltage ramp, Maximum ramp value = ±500 V di/dt = ±20 A/µs, Linear current ramp, Maximum ramp value = ±10 A ‘4125 ‘4219 ±134 ±229 V I(BO) Breakover current dv/dt = ±250 V/ms, R SOURCE = 300 Ω ±0.15 ±0.6 A VT On-state voltage I T = ±5A, tW = 100 µs ±3V IH Holding current I T = ±5A, di/dt = +/-30mA/ms ±0.15 ±0.6 A dv/dt Critical rate of rise of off-state voltage Linear voltage ramp, Maximum ramp value < 0.85V DRM ±5 kV/µs ID Off-state current V D = ±50 V TA = 85 °C ±10 µA Coff Off-state capacitance f=1MHz, Vd =1 V rms, VD =0, f=1MHz, Vd =1 V rms, VD =-1V f=1MHz, Vd =1 V rms, VD =-2V f=1MHz, Vd =1 V rms, VD =-50 V f=1MHz, Vd =1 V rms, VD = -100 V (see Note 5) 80 71 65 30 23 90 79 74 35 28 pF NOTE 5: To avoid possible voltage clipping, the ‘4125 is tested with VD =-98 V. Parameter Test Conditions Min Typ Max Unit RθJA Junction to free air thermal resistance EIA/JESD51-3 PCB, IT = ITSM(1000) , TA = 25 °C, (see Note 6) 113 °C/W 265 mm x 210 mm populated line card, 4-layer PCB, IT = ITSM(1000) , TA = 25 °C 50 NOTE 6: EIA/JESD51-2 environment and the PCB has standard footprint dimensions connected with 5 A rated printed wiring track widths. |
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