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TISP4125J1 Datasheet(PDF) 11 Page - Bourns Electronic Solutions

Part # TISP4125J1
Description  BIDIRECTIONAL THYRISTOR OVERVOLTAGE PROTECTORS
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Manufacturer  BOURNS [Bourns Electronic Solutions]
Direct Link  http://www.bourns.com
Logo BOURNS - Bourns Electronic Solutions

TISP4125J1 Datasheet(HTML) 11 Page - Bourns Electronic Solutions

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SEPTEMBER 2001 - REVISED FEBRUARY 2005
Specifications are subject to change without notice.
Customers should verify actual device performance in their specific applications.
TISP4xxxJ1BJ Overvoltage Protector Series
ITU-T K.20, K.45 and K.21 Designs (Continued)
An ITU-T compliant design would probably require the replacement of the fuses by coordination resistors. With a ±410 V off-state voltage, this
may seem unnecessary as modern primary protectors will switch at lower voltages and automatically coordinate. On a perfect longitudinal
waveform this is true. However, the ITU-T also applies a transverse (metallic) test as well, to simulate non-simultaneous switching of the
primary protection. In this case, one conductor is grounded, which places the RING to TIP protection in parallel with the unswitched primary
protector. The ±270 V off-state voltage is likely to be lower than the primary switching voltage and there isn’t coordination. Under GR-1089-
CORE conditions with non-simultaneous switching, the 100 A 10/1000 current, which should have gone through the unswitched primary
protector, is diverted through the top arms of the Y into the switched primary, causing a 200 A current flow in that primary protector.
±550
±700
±550
±700
TISP3350T3BJ
TISP4350J1BJ
±275
±350
±640
±790
±640
±790
TISP3395T3BJ
TISP4395J1BJ
±320
±395
RING to TIP Voltages
RING to GROUND,
TIP to GROUND Voltages
ITU-T Y Configuration Parts and Part Voltages
R1a = R1b = 6.5 Ω
VDRM
V
V(BO)
V
VDRM
V
V(BO)
V
Th1a + Th1b
Part #
Th2
Part #
VDRM
V
V(BO)
V
Asymmetrical Designs
These designs are for special needs, where the RING to TIP protection voltage must be different to the RING to GROUND and TIP to
GROUND voltages. ADSL modem interfaces often have a need for asymmetric voltage limiting, see Figure 16. Here, the RING to TIP voltage
limitation is given by the d.c. blocking capacitor, C1, and the RING to GROUND and TIP to GROUND limitation is insulation breakdown. Often
the breakdown limit is set by the spacing of the PW (Printed Wiring) tracks. Figure 17 shows a solution. Using two ±165 V V(BO) parts for Th1a
and Th1b, the RING to TIP voltage is limited to ±330 V. Using a higher voltage ±350 V V(BO) part for Th2 limits the insulation stress to ±515 V.
Figure 17 and its following table is for a GR-1089-CORE compliant design.
RING to TIP Voltages
RING to GROUND,
TIP to GROUND Voltages
GR-1089-CORE Y Configuration Parts and Part Voltages
VDRM
V
V(BO)
V
VDRM
V
V(BO)
V
Th1a, Th1b
Th2
Part #
VDRM
V
V(BO)
V
Part #
VDRM
V
V(BO)
V
±270
±330
±410
±515
TISP4165H3BJ
±135
±165
TISP4350J1BJ
±275
±350
Figure 16. ADSL Modem Interface Voltage Limitations
Figure 17. Asymmetrical Design for US ADSL Modems
T1
TIP
RING
C1
T1 or PW
Insulation
Breakdown
C1
Voltage
Limit
AI4JAH
Th1a
TISP4165H3BJ
Th2
TISP4350J1BJ
Th1b
TISP4165H3BJ
F1a
F1b
RING
TIP


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