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TISP9110LDM Datasheet(PDF) 1 Page - Bourns Electronic Solutions |
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TISP9110LDM Datasheet(HTML) 1 Page - Bourns Electronic Solutions |
1 / 5 page AUGUST 2004 – REVISED FEBRUARY 2005 Specifications are subject to change without notice. Customers should verify actual device performance in their specific applications. TISP9110LDM Overvoltage Protector TISP9110LDM INTEGRATED COMPLEMENTARY BUFFERED-GATE SCRS FOR DUAL POLARITY SLIC OVERVOLTAGE PROTECTION Device Symbol High Performance Protection for SLICs with +ve and -ve Battery Supplies – Wide -110 V to +110 V Programming Range – Low 5 mA max. Gate Triggering Current – Dynamic Protection Performance Specified for International Surge Waveshapes Applications include: – Wireless Local Loop – Access Equipment – Regenerated POTS – VOIP Applications Rated for International Surge Wave Shapes How To Order 8-SOIC (210 mil) Package (Top View) Description The TISP9110LDM is a programmable overvoltage protection device designed to protect modern dual polarity supply rail ringing SLICs (Subscriber Line Interface Circuits) against overvoltages on the telephone line. Overvoltages can be caused by lightning, a.c. power contact and induction. Four separate protection structures are used; two positive and two negative to provide optimum protection during Metallic (Differential) and Longitudinal (Common Mode) protection conditions in both polarities. Dynamic protection performance is specified under typical international surge waveforms from Telcordia GR-1089- CORE, ITU-T K.44 and YD/T 950. The TISP9110LDM is programmed by connecting the G1 and G2 gate terminals to the negative (-V(BAT)) and positive (+V(BAT)) Wave Shape Standard IPPSM A 2/10 GR-1089-CORE 100 10/700 ITU-T K.20/21/45 45 10/1000 GR-1089-CORE 30 MD-8SOIC(210)-003-a NC - No internal connection Terminal typical application names shown in parenthesis 1 2 3 45 6 7 8 NC Ground Ground NC (-V (BAT)) G1 (Tip or Ring) Line (Ring or Tip) Line (+V (BAT)) G2 SD-TISP9-001-a G2 G1 Ground Line Line SLIC Battery supplies respectively. This creates a protector operating at typically +1.4 V above +V(BAT) and -1.4 V below -V(BAT) under a.c. power induction and power contact conditions. The protector gate circuitry incorporates 4 separate buffer transistors designed to provide independent control for each protection element. The gate buffer transistors minimize supply regulation issues by reducing the gate current drawn to around 5 mA, while the high voltage base emitter structures eliminate the need for expensive reverse bias protection gate diodes. The TISP9110LDM is rated for common surges contained in regulatory requirements such as ITU-T K.20, K.45, Telcordia GR-1089-CORE, YD/T 950. By the use of appropriate overcurrent protection devices such as the Bourns® Multifuse® and Telefuse™ devices, circuits can be designed to comply with modern telecom standards. *RoHS Directive 2002/95/EC Jan 27 2003 including Annex ............................................... UL Recognized Component Device Package Carrier Marking Code Standard Quantity TISP9110LDM 8-SOIC (210 mil) Embossed Tape Reeled TISP9110LDMR-S 9110L 2000 For Lead Free Termination Finish Order As |
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