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ADE7769AR-REF Datasheet(PDF) 1 Page - Analog Devices

Part # ADE7769AR-REF
Description  Energy Metering IC with Integrated Oscillator and No-Load Indication
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ADE7769AR-REF Datasheet(HTML) 1 Page - Analog Devices

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Energy Metering IC with Integrated
Oscillator and No-Load Indication
ADE7769
Rev. A
Information furnished by Analog Devices is believed to be accurate and reliable.
However, no responsibility is assumed by Analog Devices for its use, nor for any
infringements of patents or other rights of third parties that may result from its use.
Specifications subject to change without notice. No license is granted by implication
or otherwise under any patent or patent rights of Analog Devices. Trademarks and
registered trademarks are the property of their respective owners.
One Technology Way, P.O. Box 9106, Norwood, MA 02062-9106, U.S.A.
Tel: 781.329.4700
www.analog.com
Fax: 781.461.3113
© 2005 Analog Devices, Inc. All rights reserved.
FEATURES
On-chip oscillator as clock source
High accuracy, supports 50 Hz/60 Hz IEC62053-21
Less than 0.1% error over a dynamic range of 500 to 1
Supplies average real power on frequency outputs F1 and F2
High frequency output CF calibrates and supplies
instantaneous real power
CF output remains logic high when ADE7769 is under
no-load threshold
Logic output REVP indicates a potential miswiring or
negative power
Direct drive for electromechanical counters and 2-phase
stepper motors (F1 and F2)
Proprietary ADCs and DSPs provide high accuracy over
large variations in environmental conditions and time
On-chip power supply monitoring
On-chip creep protection (no-load threshold)
On-chip reference 2.45 V (20 ppm/°C typical) with external
overdrive capability
Single 5 V supply, low power (20 mW typical)
Low cost CMOS process
GENERAL DESCRIPTION
The ADE77691 is a high accuracy electrical energy metering IC.
It is a pin reduction version of the ADE7755 with an enhanced,
precise oscillator circuit that serves as a clock source to the chip.
The ADE7769 eliminates the cost of an external crystal or
resonator, thus reducing the overall cost of a meter built with
this IC. The chip directly interfaces with the shunt resistor.
1U.S. Patents 5,745,323; 5,760,617; 5,862,069; 5,872,469; others pending.
The ADE7769 specifications surpass the accuracy require-
ments of the IEC62053-21 standard. The AN-679 Application
Note can be used as a basis for a description of an IEC61036
(equivalent to IEC62053-21) low cost, watt-hour meter
reference design.
The only analog circuitry used in the ADE7769 is in the Σ-Δ
ADCs and reference circuit. All other signal processing, such as
multiplication and filtering, is carried out in the digital domain.
This approach provides superior stability and accuracy over
time and extreme environmental conditions.
The ADE7769 supplies average real power information on the
low frequency outputs, F1 and F2. These outputs can be used to
directly drive an electromechanical counter or interface with an
MCU. The high frequency CF logic output, ideal for calibration
purposes, provides instantaneous real power information.
The ADE7769 includes a power supply monitoring circuit on
the VDD supply pin. The ADE7769 remains inactive until the
supply voltage on VDD reaches approximately 4 V. If the supply
falls below 4 V, the ADE7769 also remains inactive and the F1,
F2, and CF outputs are in their nonactive modes.
Internal phase matching circuitry ensures that the voltage and
current channels are phase matched, while the HPF in the
current channel eliminates dc offsets. An internal no-load
threshold ensures that the ADE7769 does not exhibit creep
when no load is present. During a no-load condition, the CF
pin stays logic high.
The ADE7769 has a 16-lead, narrow body SOIC package.
FUNCTIONAL BLOCK DIAGRAM
MULTIPLIER
REVP
V2P
V2N
V1P
RCLKIN
REFIN/OUT
F1
F2
CF
SCF
S0
S1
PHASE
CORRECTION
4k
Ω
...110101...
SIGNAL
PROCESSING
BLOCK
POWER
SUPPLY MONITOR
Σ-Δ
ADC
V1N
ADE7769
...11011001...
2.5V
REFERENCE
VDD
AGND
DGND
Φ
INTERNAL
OSCILLATOR
Σ-Δ
ADC
LPF
HPF
+
+
1
6
13
7
11
8
10
12
14
16
15
9
DIGITAL-TO-FREQUENCY
CONVERTER
2
3
4
5
Figure 1.


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