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ADV212BBCZRL-150 Datasheet(PDF) 2 Page - Analog Devices |
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ADV212BBCZRL-150 Datasheet(HTML) 2 Page - Analog Devices |
2 / 44 page ADV212 Rev. 0 | Page 2 of 44 TABLE OF CONTENTS Features .............................................................................................. 1 Applications....................................................................................... 1 General Description ......................................................................... 1 Revision History ............................................................................... 2 JPEG 2000 Feature Support......................................................... 3 Specificatons...................................................................................... 4 Supply Voltages and Current ...................................................... 4 Input/Output Specifications........................................................ 4 Clock and RESET Specifications ................................................ 5 Normal Host Mode—Write Operation ..................................... 6 Normal Host Mode—Read Operation ...................................... 7 DREQ/DACK DMA Mode—Single FIFO Write Operation .. 8 DREQ/DACK DMA Mode—Single FIFO Read Operation . 10 External DMA Mode—FIFO Write, Burst Mode .................. 12 External DMA Mode—FIFO Read, Burst Mode ................... 13 Streaming Mode (JDATA)—FIFO Read/Write ...................... 14 VDATA Mode Timing ............................................................... 15 Raw Pixel Mode Timing ............................................................ 17 JTAG Timing............................................................................... 18 Absolute Maximum Ratings.......................................................... 19 Thermal Resistance .................................................................... 19 ESD Caution................................................................................ 19 Pin Configurations and Function Descriptions ......................... 20 Theory of Operation ...................................................................... 25 Wavelet Engine ........................................................................... 25 Entropy Codecs........................................................................... 25 Embedded Processor System .................................................... 25 Memory System.......................................................................... 25 Internal DMA Engine ................................................................ 25 ADV212 Interface .......................................................................... 26 Video Interface (VDATA Bus).................................................. 26 Host Interface (HDATA Bus) ................................................... 26 Direct and Indirect Registers .................................................... 26 Control Access Registers ........................................................... 27 Pin Configuration and Bus Sizes/Modes ................................ 27 Stage Register .............................................................................. 27 JDATA Mode............................................................................... 27 External DMA Engine ............................................................... 27 Internal Registers............................................................................ 28 Direct Registers........................................................................... 28 Indirect Registers........................................................................ 29 PLL ............................................................................................... 30 Hardware Boot............................................................................ 31 Video Input Formats ...................................................................... 32 Applications..................................................................................... 34 Encode—Multichip Mode......................................................... 34 Decode—Multichip Master/Slave ............................................ 35 Digital Still Camera/Camcorder .............................................. 36 Encode/Decode SDTV Video Application ............................. 37 32-Bit Host Application............................................................. 38 HIPI (Host Interface—Pixel Interface) ................................... 39 JDATA Interface ......................................................................... 40 Outline Dimensions ....................................................................... 41 Ordering Guide .......................................................................... 42 REVISION HISTORY 10/06—Revision 0: Initial Version |
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