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IDT70T16A25PFI Datasheet(PDF) 6 Page - Integrated Device Technology |
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IDT70T16A25PFI Datasheet(HTML) 6 Page - Integrated Device Technology |
6 / 18 page 6.42 IDT70T16/5L High-Speed 2.5V 16/8K x 9 Dual-Port Static RAM Industrial and Commercial Temperature Ranges 6 PRELIMINARY DC Electrical Characteristics Over the Operating Temperature and Supply Voltage Range (VDD = 2.5V ± 100mV) 70T16/5L20 Com 'l Only 70T16/5L25 Com 'l & Ind S ym bol P aram eter Test Condition V ersion Typ. (2) Max. Typ. (2) Max. Unit IDD Dynam ic Operating Curre nt (B o th P o rts Ac tive ) CE = V IL, Outp uts Dis abled SEM = VIH f = fMA X(3) CO M 'L L 80 140 70 130 mA IND L ____ ____ 100 160 ISB 1 S tand b y Curre nt (B o th P o rts - TTL Le ve l Inp uts ) CER and CEL = VIH SEMR = SEML = V IH f = fMA X(3) CO M 'L L 12 20 7 17 mA IND L ____ ____ 12 25 ISB 2 S tand b y Curre nt (O ne P o rt - TTL Le ve l Inp uts ) CE"A " = VIL and CE"B " = V IH(1) A ctive P o rt O utp uts Disab le d , f=fMA X(3) SEMR = SEML = V IH CO M 'L L 5590 4080 mA IND L ____ ---- 55 100 ISB 3 Full S tand b y Curre nt (B oth P o rts - CM O S Le ve l Inp uts) Bo th Po rts CEL and CER > VDD - 0.2V, V IN > VDD - 0.2V o r V IN < 0.2 V, f = 0 (4) SEMR = SEML > V DD-0.2V CO M 'L L 0.05 2.5 0.05 2.5 mA IND L ____ ____ 0.2 5.0 ISB 4 Full S tand b y Curre nt (O ne P o rt - CM O S Le ve l Inp uts) CE"A " < 0.2V and CE"B " > V DD - 0.2V(1) SEMR = SEML > V DD-0.2V V IN > VDD - 0.2V o r V IN < 0.2V A ctive P o rt O utp uts Disab le d , f = fMA X(3) CO M 'L L 5590 4080 mA IND L ____ ____ 55 100 5663 tb l 0 9 Timing of Power-Up / Power-Down CE 5663 drw 06 tPU ICC ISB tPD 50% 50% , 1.25V 50 Ω 50 Ω 5663 drw 04 10pF / 5pF* (Tester) DATAOUT , BUSY INT Figure 1. AC Output Test Load *(For tLZ, tHZ, tWZ, tOW) Output Loads and AC Test Conditions Input Pulse Levels Input Rise/Fall Times Input Timing Reference Levels Output Reference Levels Output Load GND to 2.5V 3ns Max. 1.25V 1.25V Figures 1 5663 tbl 10 NOTES: 1. Port "A" may be either left or right port. Port "B" is the opposite from port "A". 2. VDD = 2.5V, TA = +25°C, and are not production tested. IDD dc = 85mA (typ.) 3. At f = fMAX , address and control lines (except Output Enable) are cycling at the maximum frequency read cycle of 1/tRC, and using “AC Test Conditions” of input levels of GND to 3V. 4. f = 0 means no address or control lines change. |
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