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ST72P361J6T3 Datasheet(PDF) 5 Page - STMicroelectronics |
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ST72P361J6T3 Datasheet(HTML) 5 Page - STMicroelectronics |
5 / 224 page ST72361 5/224 1 INTRODUCTION The ST72361 devices are members of the ST7 mi- crocontroller family designed for mid-range appli- cations with LIN (Local Interconnect Network) in- terface. All devices are based on a common industry- standard 8-bit core, featuring an enhanced instruc- tion set and are available with FLASH or ROM pro- gram memory. The enhanced instruction set and addressing modes of the ST7 offer both power and flexibility to software developers, enabling the design of highly efficient and compact application code. In addition to standard 8-bit data management, all ST7 micro- controllers feature true bit manipulation, 8x8 un- signed multiplication and indirect addressing modes. Figure 1. Device Block Diagram 8-BIT CORE ALU OSC1 OSC2 RESET PORT A CONTROL RAM PA7:0 (8 bits)1 PROGRAM (16 - 60 Kbytes) MEMORY PLL x 2 PWM 8-Bit PORT B PORT C SPI LINSCI2 PB7:0 (8 bits)1 PC7:0 (8 bits)1 OSC PORT D PD7:0 (8 bits)1 /2 option LINSCI1 16-Bit TIMER (LIN master) (LIN master/slave) VSS VDD POWER SUPPLY PORT E PE7:0 (8 bits)1 PORT F PF7:0 (8 bits)1 TIMER ART MCC (Clock Control) 1On some devices only (see Device Summary on page 1) TLI1 WATCHDOG WINDOW (1.5 - 2 Kbytes) 3 |
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