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SKIP ROM

1

0

0

0

1

1

0

Reset

and

Presence

Signals

Skip ROM (CCh)

1

MEMORY/STATUS FUNCTION COMMANDS

READ DATA MEMORY COMMANDS

READ MEMORY/Page CRC

bq2022A

SLUS724 – SEPTEMBER 2006

This SKIP ROM command, CCh, allows the host to access the memory/status functions without issuing the

64-bit ROM code sequence. The SKIP ROM command is directly followed by a memory/status functions

command. Because this command can cause bus collisions when multiple SDQ devices are on the same bus,

this command should be issued in single device applications.

Figure 6. SKIP ROM Sequence

Six memory/status function commands allow read and modification of the 1024-bit EPROM data memory or the

64-bit EPROM status memory. There are two types of READ MEMORY command, plus the WRITE MEMORY,

READ STATUS, and WRITE STATUS commands. Additionally, the part responds to a PROGRAM PROFILE

byte command. The bq2022A responds to memory/status function commands only after a part is selected by a

ROM command.

Two READ MEMORY commands are available on the bq2022A. Both commands are used to read data from the

1024-bit EPROM data field. They are the READ MEMORY/Page CRC and the READ MEMORY/Field CRC

commands. The READ MEMORY/Page CRC generates CRC at the end any 32-byte page boundary whereas

the READ MEMORY/Field CRC generates CRC when the end of the 1024-bit data memory is reached.

To read memory and generate the CRC at the 32-byte page boundaries of the bq2022A, the ROM command is

followed by the READ MEMORY/Generate CRC command, C3h, followed by the address low byte and then the

address high byte.

An 8-bit CRC of the command byte and address bytes is computed by the bq2022A and read back by the host

to confirm that the correct command word and starting address were received. If the CRC read by the host is

incorrect, a reset pulse must be issued and the entire sequence must be repeated. If the CRC received by the

host is correct, the host issues read time slots and receives data from the bq2022A starting at the initial address

and continuing until the end of a 32-byte page is reached. At that point, the host sends eight additional read time

slots and receive an 8-bit CRC that is the result of shifting into the CRC generator all of the data bytes from the

initial starting byte to the last byte of the current page. Once the 8-bit CRC has been received, data is again

read from the 1024-bit EPROM data field starting at the next page. This sequence continues until the final page

and its accompanying CRC are read by the host. Thus each page of data can be considered to be 33 bytes

long, the 32 bytes of user-programmed EPROM data and an 8-bit CRC that gets generated automatically at the

end of each page.

READ

EPROM Memory and CRC

Initialization and ROM

Read and

MEMORY/Generate

Address Low Byte Address High Byte

Byte

Command Sequence

Verify CRC

CRC Command

Generated at 32-Byte

Page

C3h

A0

A7 A8

A15

Boundaries

NOTE: Individual bytes of address and data are transmitted LSB first.

Figure 7. READ MEMORY/Page CRC

7

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