9

AT89C2051x2

3285B–MICRO–10/03

Notes:

1. The internal memory address counter is reset to 000H on the rising edge of RST and is advanced by a positive pulse at

XTAL1 pin.

2. Chip Erase requires a 10 ms PROG pulse.

3. P3.1 is pulled Low during programming to indicate RDY/BSY.

Flash Programming Modes

Mode

RST/VPP

P3.2/PROG

P3.3

P3.4

P3.5

P3.7

Write Code Data

(1)(3)

12V

L

H

H

H

Read Code Data

(1)

HH

L

L

H

H

Write Lock

Bit - 1

12V

H

H

H

H

Bit - 2

12V

H

H

L

L

Chip Erase

12V

H

L

L

L

Read Signature Byte

H

H

L

L

L

L

(2)