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MRF7S21170HR3 Datasheet(PDF) 2 Page - Freescale Semiconductor, Inc |
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MRF7S21170HR3 Datasheet(HTML) 2 Page - Freescale Semiconductor, Inc |
2 / 12 page 2 RF Device Data Freescale Semiconductor MRF7S21170HR3 MRF7S21170HSR3 Table 3. ESD Protection Characteristics Test Methodology Class Human Body Model (per JESD22-A114) 1A (Minimum) Machine Model (per EIA/JESD22-A115) B (Minimum) Charge Device Model (per JESD22-C101) IV (Minimum) Table 4. Electrical Characteristics (TC = 25°C unless otherwise noted) Characteristic Symbol Min Typ Max Unit Off Characteristics Zero Gate Voltage Drain Leakage Current (VDS = 65 Vdc, VGS = 0 Vdc) IDSS — — 10 μAdc Zero Gate Voltage Drain Leakage Current (VDS = 28 Vdc, VGS = 0 Vdc) IDSS — — 1 μAdc Gate-Source Leakage Current (VGS = 5 Vdc, VDS = 0 Vdc) IGSS — — 500 nAdc On Characteristics Gate Threshold Voltage (VDS = 10 Vdc, ID = 270 μAdc) VGS(th) 1 2 3 Vdc Gate Quiescent Voltage (1) (VDS = 28 Vdc, ID = 1400 mAdc, Measured in Functional Test) VGS(Q) 2 2.8 4 Vdc Drain-Source On-Voltage (VGS = 10 Vdc, ID = 2.7 Adc) VDS(on) 0.1 0.15 0.3 Vdc Dynamic Characteristics (2) Reverse Transfer Capacitance (VDS = 28 Vdc ± 30 mV(rms)ac @ 1 MHz, VGS = 0 Vdc) Crss — 0.9 — pF Output Capacitance (VDS = 28 Vdc ± 30 mV(rms)ac @ 1 MHz, VGS = 0 Vdc) Coss — 703 — pF Functional Tests (In Freescale Test Fixture, 50 ohm system) VDD = 28 Vdc, IDQ = 1400 mA, Pout = 50 W Avg., f = 2112.5 MHz and f = 2167.5 MHz, Single-Carrier W-CDMA, 3GPP Test Model 1, 64 DPCH, 50% Clipping, PAR = 7.5 dB @ 0.01% Probability on CCDF. ACPR measured in 3.84 MHz Channel Bandwidth @ ±5 MHz Offset. Power Gain Gps 15 16 18 dB Drain Efficiency ηD 29 31 — % Output Peak-to-Average Ratio @ 0.01% Probability on CCDF PAR 5.7 6.1 — dB Adjacent Channel Power Ratio ACPR — -37 -35 dBc Input Return Loss IRL — -15 -9 dB Typical Performances (In Freescale Test Fixture, 50 ohm system) VDD = 28 Vdc, IDQ = 1400 mA, 2110-2170 MHz Bandwidth Video Bandwidth (Tone Spacing from 100 kHz to VBW) ΔIMD3 = IMD3 @ VBW frequency - IMD3 @ 100 kHz <1 dBc (both sidebands) VBW — 25 — MHz Gain Flatness in 60 MHz Bandwidth @ Pout = 170 W CW GF — 0.4 — dB Deviation from Linear Phase in 60 MHz Bandwidth @ Pout = 170 W CW Φ — 1.95 — ° Group Delay @ Pout = 170 W CW, f = 2140 MHz Delay — 1.7 — ns Part-to-Part Insertion Phase Variation @ Pout = 170 W CW ΔΦ — 18 — ° Gain Variation over Temperature ΔG — 0.015 — dB/°C Output Power Variation over Temperature ΔP1dB — 0.01 — dBm/°C 1. VGG = 2 x VGS(Q). Parameter measured on Freescale Test Fixture, due to resistive divider network on the board. Refer to Test Circuit schematic. 2. Part internally matched both on input and output. |
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