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AS1322B Datasheet(PDF) 2 Page - ams AG |
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AS1322B Datasheet(HTML) 2 Page - ams AG |
2 / 17 page www.austriamicrosystems.com Revision 1.03 2 - 17 AS1322 austriamicrosystems Data Sheet Pin Descriptions 4 Pin Assignments Figure 2. Pin Assignments (Top View) Pin Descriptions Table 2. Pin Descriptions Pin Name Pin Number Description SW 1 Switch Pin. Connect an inductor between this pin and VIN. Keep the PCB trace lengths as short and wide as is practical to reduce EMI and voltage overshoot. If the inductor current falls to zero, or pin SHDNN is low, an internal 100 Ω anti-ringing switch is connected from this pin to VIN to minimize EMI. Note: An optional Schottky diode can be connected between this pin and VOUT. GND 2 Signal and Power Ground. Provide a short, direct PCB path between this pin and the negative side of the output capacitor(s). FB 3 Feedback Pin. Feedback input to the gm error amplifier. Connect a resistor divider tap to this pin. The output voltage can be adjusted from 2.5 to 5V by: VOUT = 1.23V[1 + (R1/R2)] SHDNN 4 Shutdown Pin. Logic controlled shutdown input. 1 = Normal operation, 1.2MHz typical operating frequency. 0 = Shutdown; quiescent current <1µA. If SHDNN is undefined, pin SW may ring. Note: In a typical application, SHDNN should be connected to VIN through a 1M Ω pull-up resistor. VOUT 5 Output Voltage Sense Input and Drain of the Internal PMOS Synchronous Rectifier. Bias is derived from VOUT when VOUT exceeds VIN. PCB trace length from VOUT to the output filter capacitor(s) should be as short and wide as is practical. Due to the ESD protection diode of the internal PMOS synchronous rectifier, VOUT is held at VIN - 0.6V during shutdown. VIN 6 Input Voltage. The AS1322 gets its start-up bias from VIN unless VOUT exceeds VIN, in which case the bias is derived from VOUT. Thus, once started, operation is completely independent from VIN. Operation is only limited by the output power level and the internal series resistance of the supply. 1 SW AS1322 2 GND 3 FB 6 VIN 5 VOUT 4 SHDNN |
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