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HY29DS163TT-13 Datasheet(PDF) 1 Page - Hynix Semiconductor |
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HY29DS163TT-13 Datasheet(HTML) 1 Page - Hynix Semiconductor |
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1 / 48 page  KEY FEATURES n Single Power Supply Operation − Read, program, and erase operations from 1.8 to 2.2 V (2.0V ± 10%) − Ideal for battery-powered applications n Simultaneous Read/Write Operations − Host system can program or erase in one bank while simultaneously reading from any sector in the other bank with zero latency between read and write operations n High Performance − 120 and 130 ns access time versions with ± 10% power supply and 30pF load n Ultra Low Power Consumption (Typical Values) − Automatic sleep mode current: 200 nA − Standby mode current: 200 nA − Read current: 5 mA (at 5 MHz) − Program/erase current: 15 mA n Boot-Block Sector Architecture with 39 Sectors in Two Banks for Fast In-System Code Changes n Secured Sector: An Extra 64 Kbyte Sector that Can Be: − Factory locked and identifiable: 16 bytes available for a secure, random factory- programmed Electronic Serial Number − Customer lockable: Can be read, program- med, or erased just like other sectors n Flexible Sector Architecture − Sector Protection allows locking of a sector or sectors to prevent program or erase operations within that sector − Temporary Sector Unprotect allows changes in locked sectors (requires high voltage on RESET# pin) n Automatic Erase Algorithm Erases Any Combination of Sectors or the Entire Chip n Automatic Program Algorithm Writes and Verifies Data at Specified Addresses n Compliant with Common Flash Memory Interface (CFI) Specification n Minimum 100,000 Write Cycles per Sector (1,000,000 cycles Typical) n Compatible with JEDEC Standards − Pinout and software compatible with single-power supply Flash devices − Superior inadvertent write protection Preliminary Revision 1.3, April 2001 A[19:0] 20 CE# OE# RESET# BYTE# WE# 8 7 DQ[7:0] DQ[14:8] DQ[15]/A[-1] RY/BY# WP#/ACC LOGIC DIAGRAM n Data# Polling and Toggle Bits − Provide software confirmation of completion of program or erase operations n Ready/Busy# Pin − Provides hardware confirmation of completion of program or erase operations n Erase Suspend − Suspends an erase operation to allow programming data to or reading data from a sector in the same bank − Erase Resume can then be invoked to complete the suspended erasure n Hardware Reset Pin (RESET#) Resets the Device to Reading Array Data n WP#/ACC Input Pin − Write protect (WP#) function allows hardware protection of two outermost boot sectors, regardless of sector protect status − Acceleration (ACC) function provides accelerated program times n Fast Program and Erase Times − Sector erase time: 1 sec typical − Byte/Word program time utilizing Acceleration function: 13 µs typical n Space Efficient Packaging − 48-pin TSOP and 48-ball FBGA packages HY29DS162/HY29DS163 16 Megabit (2M x 8/1M x 16) Super-Low Voltage, Dual Bank, Simultaneous Read/Write, Flash Memory |
Similar Part No. - HY29DS163TT-13 |
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Similar Description - HY29DS163TT-13 |
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