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HY29DL162BT-90 Datasheet(PDF) 11 Page - Hynix Semiconductor |
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HY29DL162BT-90 Datasheet(HTML) 11 Page - Hynix Semiconductor |
11 / 48 page 11 r1.3/June 01 HY29DL162/HY29DL163 The HY29DL16x is automatically set for reading array data after device power-up and after a hard- ware reset to ensure that no spurious alteration of the memory content occurs during the power tran- sition. No command is necessary in this mode to obtain array data, and both banks of the device remain enabled for read accesses until the com- mand register contents are altered. This device features the capability of reading data from one bank of the memory while a program or erase operation is in progress in the other bank. If the host reads from an address within an eras- ing or erase-suspended sector, or from a bank where a programming operation is taking place, the device outputs status data instead of array data (see Write Operation Status section). After com- pleting an Automatic Program or Automatic Erase algorithm within a bank, that bank automatically returns to the read array data mode. When the host issues an Erase Suspend com- mand, the bank specified in the command enters the Erase- Suspended Read mode. While in that mode, the host can read data from, or program data into, any sector in that bank except the sector(s) being erased. After completing a pro- gramming operation in the Erase Suspend mode, the system may once again read array data with the same exception noted above. The host must issue a hardware reset or the soft- ware reset command to return a sector to the read array data mode if DQ[5] goes high during a pro- gram or erase cycle, or to return the device to the read array data mode while it is in the Electronic ID mode. Write Operation Certain operations, including programming data and erasing sectors of memory, require the host to write a command or command sequence to the HY29DL16x. Writes to the device are performed by placing the byte or word address on the device’s address inputs while the data to be written is input on DQ[15:0] (BYTE# = High) or DQ[7:0] (BYTE# = Low). The host system must drive the CE# and WE# pins Low and drive OE# High for a valid write operation to take place. All addresses are latched on the falling edge of WE# or CE#, whichever happens later. All data is latched on the rising edge of WE# or CE#, whichever happens first. The “Device Commands” section of this data sheet provides details on the specific device commands implemented in the HY29DL16x. Accelerated Program Operation This device offers improved performance for pro- gramming operations through the ‘Accelerate (ACC)’ function. This is one of two functions pro- vided by the WP#/ACC pin and is intended prima- rily to allow faster manufacturing throughput at the factory. If V HH is applied to this input, the device enters the Unlock Bypass mode, temporarily unprotects any protected sectors, and uses the higher voltage on the pin to reduce the time required for program operations. The host system would then use the two-cycle program command sequence as re- quired by the Unlock Bypass mode. Removing V HH from the pin returns the device to normal op- eration. This pin must not be at V HH for operations other than accelerated programming, or device damage may result. Leaving the pin floating or uncon- nected may result in inconsistent device opera- tion. Write Protect Function The Write Protect function provides a hardware method of protecting certain boot sectors without using V ID. This is the second function provided by the WP#/ACC pin. Placing this pin at V IL disables program and erase operations in two of the eight 8 Kbyte (4 Kword) boot sectors. The affected sectors are sectors S0 and S1 in a bottom-boot device, or S37 and S38 in a top-boot device. If the pin is placed at V IH, the protection state of those two sectors reverts to whether they were last set to be protected or un- protected using the method described in the Sec- tor Group Protection and Unprotection sections. Standby Operation When the system is not reading or writing to the device, it can place the device in the Standby mode. In this mode, current consumption is greatly reduced, and the data bus outputs are placed in the high impedance state, independent of the OE# input. The Standby mode can invoked using two methods. |
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