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VRS51L540-25-Q Datasheet(PDF) 5 Page - List of Unclassifed Manufacturers

Part # VRS51L540-25-Q
Description  Versa 8051 MCU with 4KB Flash
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VRS51L540-25-Q Datasheet(HTML) 5 Page - List of Unclassifed Manufacturers

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VRS51x540
______________________________________________________________________________________________
www.ramtron.com
page 5 of 40
Instruction Set
The following tables describe the instruction set of the
VRS51x540. The instructions are functional and binary
code compatible with industry standard 8051s.
TABLE 4: LEGEND FOR INSTRUCTION SET TABLE
Symbol
Function
A
Accumulator
Rn
Register R0-R7
Direct
Internal register address
@Ri
Internal register pointed to by R0 or R1 (except MOVX)
Rel
Two's complement offset byte
Bit
Direct bit address
#data
8-bit constant
#data 16
16-bit constant
addr 16
16-bit destination address
addr 11
11-bit destination address
TABLE 5: VRS51X540 INSTRUCTION SET
Mnemonic
Description
Size
(bytes)
Instr. Cycles
Arithmetic instructions
ADD A, Rn
Add register to A
1
1
ADD A, direct
Add direct byte to A
2
1
ADD A, @Ri
Add data memory to A
1
1
ADD A, #data
Add immediate to A
2
1
ADDC A, Rn
Add register to A with carry
1
1
ADDC A, direct
Add direct byte to A with carry
2
1
ADDC A, @Ri
Add data memory to A with carry
1
1
ADDC A, #data
Add immediate to A with carry
2
1
SUBB A, Rn
Subtract register from A with borrow
1
1
SUBB A, direct
Subtract direct byte from A with borrow
2
1
SUBB A, @Ri
Subtract data mem from A with borrow
1
1
SUBB A, #data
Subtract immediate from A with borrow
2
1
INC A
Increment A
1
1
INC Rn
Increment register
1
1
INC direct
Increment direct byte
2
1
INC @Ri
Increment data memory
1
1
DEC A
Decrement A
1
1
DEC Rn
Decrement register
1
1
DEC direct
Decrement direct byte
2
1
DEC @Ri
Decrement data memory
1
1
INC DPTR
Increment data pointer
1
2
MUL AB
Multiply A by B
1
4
DIV AB
Divide A by B
1
4
DA A
Decimal adjust A
1
1
Logical Instructions
ANL A, Rn
AND register to A
1
1
ANL A, direct
AND direct byte to A
2
1
ANL A, @Ri
AND data memory to A
1
1
ANL A, #data
AND immediate to A
2
1
ANL direct, A
AND A to direct byte
2
1
ANL direct, #data
AND immediate data to direct byte
3
2
ORL A, Rn
OR register to A
1
1
ORL A, direct
OR direct byte to A
2
1
ORL A, @Ri
OR data memory to A
1
1
ORL A, #data
OR immediate to A
2
1
ORL direct, A
OR A to direct byte
2
1
ORL direct, #data
OR immediate data to direct byte
3
2
XRL A, Rn
Exclusive-OR register to A
1
1
XRL A, direct
Exclusive-OR direct byte to A
2
1
XRL A, @Ri
Exclusive-OR data memory to A
1
1
XRL A, #data
Exclusive-OR immediate to A
2
1
XRL direct, A
Exclusive-OR A to direct byte
2
1
XRL direct, #data
Exclusive-OR immediate to direct byte
3
2
CLR A
Clear A
1
1
CPL A
Compliment A
1
1
SWAP A
Swap nibbles of A
1
1
RL A
Rotate A left
1
1
RLC A
Rotate A left through carry
1
1
RR A
Rotate A right
1
1
RRC A
Rotate A right through carry
1
1
Mnemonic
Description
Size
(bytes)
Instr. Cycles
Boolean Instruction
CLR C
Clear Carry bit
1
1
CLR bit
Clear bit
2
1
SETB C
Set Carry bit to 1
1
1
SETB bit
Set bit to 1
2
1
CPL C
Complement Carry bit
1
1
CPL bit
Complement bit
2
1
ANL C,bit
Logical AND between Carry and bit
2
2
ANL C,#bit
Logical AND between Carry and not bit
2
2
ORL C,bit
Logical ORL between Carry and bit
2
2
ORL C,#bit
Logical ORL between Carry and not bit
2
2
MOV C,bit
Copy bit value into Carry
2
1
MOV bit,C
Copy Carry value into Bit
2
2
Data Transfer Instructions
MOV A, Rn
Move register to A
1
1
MOV A, direct
Move direct byte to A
2
1
MOV A, @Ri
Move data memory to A
1
1
MOV A, #data
Move immediate to A
2
1
MOV Rn, A
Move A to register
1
1
MOV Rn, direct
Move direct byte to register
2
2
MOV Rn, #data
Move immediate to register
2
1
MOV direct, A
Move A to direct byte
2
1
MOV direct, Rn
Move register to direct byte
2
2
MOV direct, direct
Move direct byte to direct byte
3
2
MOV direct, @Ri
Move data memory to direct byte
2
2
MOV direct, #data
Move immediate to direct byte
3
2
MOV @Ri, A
Move A to data memory
1
1
MOV @Ri, direct
Move direct byte to data memory
2
2
MOV @Ri, #data
Move immediate to data memory
2
1
MOV DPTR, #data
Move immediate to data pointer
3
2
MOVC A, @A+DPTR
Move code byte relative DPTR to A
1
2
MOVC A, @A+PC
Move code byte relative PC to A
1
2
MOVX A, @Ri
Move external data (A8) to A
1
2
MOVX A, @DPTR
Move external data (A16) to A
1
2
MOVX @Ri, A
Move A to external data (A8)
1
2
MOVX @DPTR, A
Move A to external data (A16)
1
2
PUSH direct
Push direct byte onto stack
2
2
POP direct
Pop direct byte from stack
2
2
XCH A, Rn
Exchange A and register
1
1
XCH A, direct
Exchange A and direct byte
2
1
XCH A, @Ri
Exchange A and data memory
1
1
XCHD A, @Ri
Exchange A and data memory nibble
1
1
Branching Instructions
ACALL addr 11
Absolute call to subroutine
2
2
LCALL addr 16
Long call to subroutine
3
2
RET
Return from subroutine
1
2
RETI
Return from interrupt
1
2
AJMP addr 11
Absolute jump unconditional
2
2
LJMP addr 16
Long jump unconditional
3
2
SJMP rel
Short jump (relative address)
2
2
JC rel
Jump on carry = 1
2
2
JNC rel
Jump on carry = 0
2
2
JB bit, rel
Jump on direct bit = 1
3
2
JNB bit, rel
Jump on direct bit = 0
3
2
JBC bit, rel
Jump on direct bit = 1 and clear
3
2
JMP @A+DPTR
Jump indirect relative DPTR
1
2
JZ rel
Jump on accumulator = 0
2
2
JNZ rel
Jump on accumulator 1= 0
2
2
CJNE A, direct, rel
Compare A, direct JNE relative
3
2
CJNE A, #d, rel
Compare A, immediate JNE relative
3
2
CJNE Rn, #d, rel
Compare reg, immediate JNE relative
3
2
CJNE @Ri, #d, rel
Compare ind, immediate JNE relative
3
2
DJNZ Rn, rel
Decrement register, JNZ relative
2
2
DJNZ direct, rel
Decrement direct byte, JNZ relative
3
2
Miscellaneous Instruction
NOP
No operation
1
1
Rn:
Any of the register R0 to R7
@Ri:
Indirect addressing using Register R0 or R1
#data:
immediate Data provided with Instruction
#data16: Immediate data included with instruction
bit:
address at the bit level
rel:
relative address to Program counter from +127 to –128
Addr11: 11-bit address range
Addr16: 16-bit address range
#d:
Immediate Data supplied with instruction


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