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IDT72T51543L6BB Datasheet(PDF) 10 Page - Integrated Device Technology |
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IDT72T51543L6BB Datasheet(HTML) 10 Page - Integrated Device Technology |
10 / 57 page 10 COMMERCIALANDINDUSTRIAL TEMPERATURERANGES IDT72T51543/72T51553 2.5V, MULTI-QUEUE FLOW-CONTROL DEVICES (32 QUEUES) 18 BIT WIDE CONFIGURATION 1,179,648 and 2,359,296 bits PIN DESCRIPTIONS (CONTINUED) Symbol & Name I/O TYPE Description Pin No. RADEN Read Address LVTTL that a read queue selection cannot be made, (RADEN must NOT go active) until programming of the part (Continued) Enable INPUT has been completed and SENO has gone LOW. RCLK Read Clock LVTTL When enabled by REN, the rising edge of RCLK reads data from the selected queue via the output (T10) INPUT bus Qout. The queue to be read is selected via the RDADD address bus and a rising edge of RCLK while RADEN is HIGH. A rising edge of RCLK in conjunction with ESTR and RDADD will also select the PAEnflagquadranttobeplacedonthePAEnbusduringdirectflagoperation.Duringpolledflagoperation the PAEnbusiscycledwithrespecttoRCLKandtheESYNCsignalissynchronizedtoRCLK.ThePAE and OV outputs are all synchronized to RCLK. During device expansion the EXO and EXI signals are based on RCLK. RCLK must be continuous and free-running. RDADD Read Address LVTTL For the 32Q device the RDADD bus is 8 bits. The RDADD bus is a dual purpose address bus. The [7:0] Bus INPUT first function of RDADD is to select a queue to be read from. The least significant 5 bits of the bus, (RDADD7-P16 RDADD[4:0]areusedtoaddress1of32possiblequeueswithinamulti-queuedevice.Themostsignificant RDADD6-P15 3 bits, RDADD[7:5] are used to select 1 of 8 possible multi-queue devices that may be connected in RDADD5-P14 expansion mode. These 3 MSB’s will address a device with the matching ID code. The address present RDADD4-N16 on the RDADD bus will be selected on a rising edge of RCLK provided that RADEN is HIGH, (note, that RDADD3-N15 data can be placed on to the Qout bus, read from the previously selected queue on this RCLK edge). RDADD2-N14 On the next rising RCLK edge after a read queue select, a data word from the previous queue will be RDADD1-M16 placed onto the outputs, Qout, regardless of the REN input. Two RCLK rising edges after read queue RDADD0-M15) select, data will be placed on to the Qout outputs from the newly selected queue, regardless of RENdue to the first word fall through effect. The second function of the RDADD bus is to select the quadrant of queues to be loaded on to the PAEn bus during strobed flag mode. The least significant 2 bits, RDADD[1:0] are used to select the quadrant of a device to be placed on the PAEn bus. The most significant 3 bits, RDADD[7:5] are again used to select 1 of 8 possible multi-queue devices that may be connected in expansion mode. Address bitsRDADD[4:2]aredon’tcareduringquadrantselection.ThequadrantaddresspresentontheRDADD buswillbeselectedontherisingedgeofRCLKprovidedthatESTRisHIGH,(note,thatdatacanbeplaced on to the Qout bus, read from the previously selected queue on this RCLK edge). Please refer to Table 2 for details on RDADD bus. REN Read Enable LVTTL The REN input enables read operations from a selected queue based on a rising edge of RCLK. (T11) INPUT A queue to be read from can be selected via RCLK, RADEN and the RDADD address bus regardless ofthestateof REN.DatafromanewlyselectedqueuewillbeavailableontheQoutoutputbusonthesecond RCLK cycle after queue selection regardless of REN due to the FWFT operation. A read enable is not required to cycle the PAEn bus (in polled mode) or to select the PAEn quadrant , (in direct mode). SCLK Serial Clock LVTTL If serial programming of the multi-queue device has been selected during master reset, the SCLK input (N3) INPUT clocks the serial data through the multi-queue device. Data setup on the SI input is loaded into the device ontherisingedgeofSCLKprovidedthat SENIisenabled,LOW.Whenexpansionofdevicesisperformed the SCLK of all devices should be connected to the same source. SENI Serial Input LVTTL During serial programming of a multi-queue device, data loaded onto the SI input will be clocked into the (M2) Enable INPUT part (via a rising edge of SCLK), provided the SENI input of that device is LOW. If multiple devices are cascaded,the SENIinputshouldbeconnectedtotheSENOoutputofthepreviousdevice.Sowhenserial loading of a given device is complete, its SENOoutputgoesLOW,allowingthenextdeviceinthechain to be programmed ( SENOwillfollowSENIofagivendeviceoncethatdeviceisprogrammed).TheSENI input of the master device (or single device), should be controlled by the user. SENO SerialOutput LVTTL This output is used to indicate that serial programming or default programming of the multi-queue device (M1) Enable OUTPUT has been completed. SENOfollowsSENIonceprogrammingofadeviceiscomplete.Therefore,SENO will go LOW after programming provided SENIisLOW,onceSENIistakenHIGHagain,SENOwillalso go HIGH. When the SENOoutputgoesLOW,thedeviceisreadytobeginnormalread/writeoperations. If multiple devices are cascaded and serial programming of the devices will be used, the SENO output should be connected to the SENI input of the next device in the chain. When serial programming of the first device is complete, SENO will go LOW, thereby taking the SENI input of the next device LOW and so on throughout the chain. When a given device in the chain is fully programmed the SENO output |
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