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A8698ELJTR-T Datasheet(PDF) 9 Page - Allegro MicroSystems |
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A8698ELJTR-T Datasheet(HTML) 9 Page - Allegro MicroSystems |
9 / 12 page Wide Input Voltage 3.0 A Step Down Regulator A8698 9 Allegro MicroSystems, Inc. 115 Northeast Cutoff, Box 15036 Worcester, Massachusetts 01615-0036 (508) 853-5000 www.allegromicro.com the connection. The Rr should be much larger than the feedback resistor to prevent any potential offset in output voltage. For example, if Rf < 10 kΩ, Rr should be 1 MΩ. Cr should be selected based on the following equation: = Cr(max) (VIN(min) – VFB) × tON(min) 0.05 × Rr (5) where Cr is in pF, tON(min) is in μs, and Rr is in MΩ. RTSET Selection. Correct selection of RTSET values will ensure that minimum on-time of the switcher is not violated and prevent the switcher from cycle skipping. For a given VIN to VOUT ratio, the RTSET value must be greater than or equal to the value defined by the curve in the plot below. Note. The curve represents the minimum RTSET value. When calculating RTSET, be sure to use VIN(max) / VOUT(min). Resistor tolerance should also be considered, so that under no operating conditions the resistance on the TSET pin is allowed to go below the minimum value. FB Resistor Selection. The impedance of the FB network should be kept low to improve noise immunity. Large value resis- tors can pick up noise generated by the inductor, which can affect voltage regulation of the switcher. RTSET (k ) Violation of Minimum On-Time Safe Operating Area Minimum V alue of R TSET 13.0 12.5 12.0 11.5 11.0 10.5 10.0 9.5 9.0 8.5 8.0 7.5 7.0 6.5 6.0 5.5 5.0 4.5 4.0 3.5 3.0 2.5 2.0 |
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