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WMS128K8L-25DJMA Datasheet(PDF) 3 Page - White Electronic Designs Corporation |
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WMS128K8L-25DJMA Datasheet(HTML) 3 Page - White Electronic Designs Corporation |
3 / 8 page 3 3 3 3 3 White Electronic Designs Corporation • (602) 437-1520 • www.whiteedc.com White Electronic Designs WMS128K8-XXX Notes: VZ is programmable from -2V to +7V. IOL & IOH programmable from 0 to 16mA. Tester Impedance Z0 = 75 Ω. VZ is typically the midpoint of VOH and VOL. IOL & IOH are adjusted to simulate a typical resistive load circuit. ATE tester includes jig capacitance. AC TEST CIRCUIT AC TEST CONDITIONS Parameter Parameter Parameter Parameter Parameter Typ Typ Typ Typ Typ Unit Unit Unit Unit Unit Input Pulse Levels VIL = 0, VIH = 3.0 V Input Rise and Fall 5 ns Input and Output Reference Level 1.5 V Output Timing Reference Level 1.5 V Parameter Parameter Parameter Parameter Parameter Symbol Symbol Symbol Symbol Symbol -70 -70 -70 -70 -70 -85 -85 -85 -85 -85 -100 -100 -100 -100 -100 -120 -120 -120 -120 -120 Units Units Units Units Units Read Cycle Read Cycle Read Cycle Read Cycle Read Cycle Min Min Min Min Min Max Max Max Max Max Min Min Min Min Min Max Max Max Max Max Min Min Min Min Min Max Max Max Max Max Min Min Min Min Min Max Max Max Max Max Read Cycle Time tRC 70 85 100 120 ns Address Access Time tAA 70 85 100 120 ns Output Hold from Address Change tOH 33 3 3 ns Chip Select Access Time tACS 70 85 100 120 ns Output Enable to Output Valid tOE 35 45 50 60 ns Chip Select to Output in Low Z tCLZ1 33 3 3 ns Output Enable to Output in Low Z tOLZ1 00 0 0 ns Chip Disable to Output in High Z tCHZ1 25 25 35 35 ns Output Disable to Output in High Z tOHZ1 25 25 35 35 ns AC CHARACTERISTICS (VCC = 5.0V, TA = -55°C TO +125°C) AC CHARACTERISTICS (VCC = 5.0V, TA = -55°C TO +125°C) Parameter Parameter Parameter Parameter Parameter Symbol Symbol Symbol Symbol Symbol -70 -70 -70 -70 -70 -85 -85 -85 -85 -85 -100 -100 -100 -100 -100 -120 -120 -120 -120 -120 Units Units Units Units Units Write Cycle Write Cycle Write Cycle Write Cycle Write Cycle Min Min Min Min Min Max Max Max Max Max Min Min Min Min Min Max Max Max Max Max Min Min Min Min Min Max Max Max Max Max Min Min Min Min Min Max Max Max Max Max Write Cycle Time tWC 70 85 100 120 ns Chip Select to End of Write tCW 60 75 80 100 ns Address Valid to End of Write t AW 60 75 80 100 ns Data Valid to End of Write tDW 30 35 40 50 ns Write Pulse Width tWP 50 55 70 80 ns Address Setup Time tAS 00 0 0 ns Address Hold Time tAH 55 5 5 ns Output Active from End of Write tOW1 55 5 5 ns Write Enable to Output in High Z tWHZ1 25 30 35 35 ns Data Hold Time tDH 00 0 0 ns 1. This parameter is guaranteed by design but not tested. 1. This parameter is guaranteed by design but not tested. |
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