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MF0015M-03ATXX Datasheet(PDF) 3 Page - Mitsubishi Electric Semiconductor |
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MF0015M-03ATXX Datasheet(HTML) 3 Page - Mitsubishi Electric Semiconductor |
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3 / 29 page  MITSUBISHI STORAGE CARD ATA PC CARDS MITSUBISHI ELECTRIC 3 1997.Nov. Rev. 1.2 Signal Description Signal Name I/O Pin No. Description Address bus[A10-A0] I 8, 11, 12, 22, 23, 24, 25, 26, 27, 28, 29 Signals A10-A0 are address bus. A0 is invalid in word mode. A10 is the MSB and A0 is the LSB. Data bus[D15-D0] I/O 41, 40, 39, 38, 37, 66, 65, 64, 6, 5, 4, 3, Signals D15-D0 are data bus. D0 is the LSB of the Even Byte of the Word. D8 is the LSB of the Odd Byte of the Word. 2 ,32,31, 30 Card Enable[CE1#, CE2#] (PC Card Memory Mode) I 7, 42 CE1# and CE2# are low active card select signals. Card Enable[CE1#, CE2#] (PC Card I/O Mode) Chip Select[CS0#, CS1#] (IDE ATA Interface) In IDE ATA Interface, CS0 is used to select the Command Block Registers. CS1 is used to select the Control Block Registers. Output Enable[OE#] (PC Card Memory Mode) I 9 OE# is used to gate Attribute and Common Memory Read data from the ATA Card. Output Enable[OE#] (PC Card I/O Mode) OE# is used to gate Attribute Memory Read data from the ATA Card. ATA SEL# (IDE ATA Interface) To enable IDE ATA Interface, this input should be grounded by the host. Write Enable[WE#] (PC Card Memory Mode) I 15 WE# is used for strobing Attribute and Common Memory Write data into the ATA Card. Write Enable[WE#] (PC Card I/O Mode) WE# is used for strobing Attribute Memory Write data into the ATA Card. Write Enable[WE#] (IDE ATA Interface) This input should be connected Vcc by the host. I/O Read[IORD#] (PC Card I/O Mode) I 44 IORD# is used to read data from the Card’s I/O space. I/O Read[IORD#] (IDE ATA Interface) I/O Write[IOWR#] (PC Card I/O Mode) I 45 IOWR# is used to write data to the Card’s I/O space. I/O Write[IOWR#] (IDE ATA Interface) Ready[READY] (PC Card Memory Mode) O 16 READY signal is set high when the ATA Card is ready to accept a new data transfer operation. IREQ# (PC Card I/O Mode) This signal of low level is indicates that the card is requesting software service to host, and high level indicates that the card is not requesting. INTRQ (IDE ATA Interface) This signal is active high interrupt request to the host. Card Detection[CD1#, CD2#] O 36, 67 CD1# and CD2# provided for proper detection of PC Card insertion. Write Protect[WP] (PC Card Memory Mode) O 33 This signal is held low because this card does not have a write protect switch. IOIS16# (PC Card I/O Mode) This output signal is asserted when the I/O port address is capable of 16-bit access. IOCS16# (IDE ATA Interface) |
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