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IDT723672L12PF Datasheet(PDF) 2 Page - Integrated Device Technology |
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IDT723672L12PF Datasheet(HTML) 2 Page - Integrated Device Technology |
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2 / 29 page  2 COMMERCIALTEMPERATURERANGE IDT723652/723662/723672 CMOS SyncBiFIFOTM 2,048 x 36 x 2, 4,096 x 36 x 2 and 8,192 x 36 x 2 DESCRIPTION (CONTINUED) NOTES: 1. NC – no internal connection 2. Uses Yamaichi socket IC51-1324-828 PQFP(2) (PQ132-1, order code: PQF) TOP VIEW NC NC A35 A34 A33 A32 VCC A31 A30 GND A29 A28 A27 A26 A25 A24 A23 FWFT A22 VCC A21 A20 A19 A18 GND A17 A16 A15 A14 A13 VCC A12 NC NC B35 B34 B33 B32 GND B31 B30 B29 B28 B27 B26 VCC B25 B24 GND B23 B22 B21 B20 B19 B18 GND B17 B16 VCC B15 B14 B13 B12 GND NC NC 18 19 20 21 22 23 24 25 26 27 28 29 30 31 32 33 34 35 36 37 38 39 40 41 42 43 44 45 46 47 48 49 50 116 115 114 113 112 111 110 109 108 107 106 105 104 103 102 101 100 99 98 97 96 95 94 93 92 91 90 89 88 87 86 85 84 5609 drw 02 These devices are a synchronous (clocked) FIFO, meaning each port employs a synchronous interface. All data transfers through a port are gated to the LOW-to-HIGH transition of a port clock by enable signals. The clocks for each port are independent of one another and can be asynchronous or coincident. The enables for each port are arranged to provide a simple bidirectional interface between microprocessors and/or buses with synchro- nous control. These devices have two modes of operation: In the IDT Standard mode, the first word written to an empty FIFO is deposited into the memory array. A read operation is required to access that word (along with all other words residing in memory). In the First Word Fall Through mode (FWFT), the first long-word (36-bit wide) written to an empty FIFO appears automatically on the outputs, no read operation required (Nevertheless, accessing subsequent words does necessitate a formal read request). The state of the FWFT pin during FIFO operation determines the mode in use. EachFIFOhasacombinedEmpty/OutputReadyFlag( EFA/ORAandEFB/ ORB) and a combined Full/Input Ready Flag ( FFA/IRA and FFB/IRB). The EF and FF functions are selected in the IDT Standard mode. EF indicates whether or not the FIFO memory is empty. FF shows whether the memory is full or not. The IR and OR functions are selected in the First Word Fall Through *Electrical pin 1 in center of beveled edge. Pin 1 identifier in corner. PIN CONFIGURATION |
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