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FastEdge™ Series
CY2DP3110
Document #: 38-07469 Rev.*G
Page 7 of 9
3. 3V
Z o = 50 oh m
3. 3V
5"
5"
C Y 2D P 3 11 0
120 oh m
12 0 o h m
VC C = 3 . 3 V
VE E = 0 V
LV D S
51 o h m
( 2 pl a c es )
33 o h m
( 2 p l ac es )
L VPEC L t o
LV D S
Figure 8. Low-voltage Positive Emitter-coupled Logic (LVPECL) to a Low-voltage Differential Sig-
naling (LVDS) Interface
Figure 9. Termination for LVPECL to HTSL interface for VCC=2.5V would use X=50 Ohms, Y=2300 Ohms, and Z=1000
Ohms. See application note titled, “PECL Translation, SAW Oscillators, and Specs” for other signalling standards
and supplies.
VCC
VDD-2
Y
X
Z
One output is shown for clarity
Ordering Information
Part Number
Package Type
Product Flow
CY2DP3110AI
32-pin TQFP
Industrial, –40
° to 85°C
CY2DP3110AIT
32-pin TQFP – Tape and Reel
Industrial, –40
° to 85°C
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