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CY2DP3120AXI Datasheet(PDF) 3 Page - Cypress Semiconductor

Part # CY2DP3120AXI
Description  1:20 Differential Clock/Data Fanout Buffer
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Manufacturer  CYPRESS [Cypress Semiconductor]
Direct Link  http://www.cypress.com
Logo CYPRESS - Cypress Semiconductor

CY2DP3120AXI Datasheet(HTML) 3 Page - Cypress Semiconductor

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FastEdge™ Series
CY2DP3120
Document #: 38-07514 Rev.*C
Page 3 of 9
Absolute Maximum Ratings
Parameter
Description
Condition
Min.
Max.
Unit
VCC
Positive Supply Voltage
Non-Functional
–0.3
4.6
V
VEE
Negative Supply Voltage
Non-Functional
-4.6
0.3
V
TS
Temperature, Storage
Non-Functional
–65
+150
°C
TJ
Temperature, Junction
Non-Functional
150
°C
ESDh
ESD Protection
Human Body Model
2000
V
MSL
Moisture Sensitivity Level
3
N.A.
Gate Count Total Number of Used Gates
Assembled Die
50
gates
Multiple Supplies: The Voltage on any input or I/O pin cannot exceed the power pin during power-up. Power supply sequencing is NOT required.
Operating Conditions
Parameter
Description
Condition
Min.
Max.
Unit
IBB
Output Reference Current
Relative to VBB
|200|
uA
LUI
Latch Up Immunity
Functional, typical
100
mA
TA
Temperature, Operating Ambient
Functional
–40
+85
°C
ØJc
Dissipation, Junction to Case
Functional
22[4]
°C/W
ØJa
Dissipation, Junction to Ambient
Functional
60[4]
°C/W
IEE
Maximum Quiescent Supply Current
VEE pin
250[5]
mA
CIN
Input pin capacitance
3pF
LIN
Pin Inductance
1nH
VIN
Input Voltage
Relative to VCC[6]
–0.3
VCC + 0.3
V
VTT
Output Termination Voltage
Relative to VCC[6]
VCC – 2
V
VOUT
Output Voltage
Relative to VCC[6]
–0.3
VCC + 0.3
V
IIN
Input Current (ECL,PECL and HSTL)[7] VIN = VIL, or VIN = VIH
l150l
uA
PECL/HSTL DC Electrical Specifications
Parameter
Description
Condition
Min.
Max.
Unit
VCC
Operating Voltage
2.5V ± 5%, VEE = 0.0V
3.3V ± 5%, VEE = 0.0V
2.375
3.135
2.625
3.465
V
V
VCMR
PECL Input Differential Crosspoint
Voltage[8]
Differential operation
1.2
VCC
V
VX
HSTL Input Differential Crosspoint Volt-
age[9]
Standard Load Differential
Operation
0.68
0.9
V
VOH
Output High Voltage
IOH = –30 mA[10]
VCC – 1.25
VCC – 0.7
V
VOL
Output Low Voltage
VCC = 3.3V ± 5%
VCC = 2.5V ± 5%
IOL = –5 mA[10]
VCC – 1.995
VCC –1.995
VCC – 1.5
VCC – 1.3
V
V
VIH
Input Voltage, High
Single-ended operation
VCC – 1.165
VCC – 0.880 [11]
V
VIL
Input Voltage, Low
Single-ended operation
VCC – 1.945 [11]
VCC – 1.625
V
VBB[3]
Output Reference Voltage
Relative to VCC[6]
VCC – 1.620
VCC – 1.220
V
Notes:
4. Theta JA EIA JEDEC 51 test board conditions (typical value); Theta JC 883E Method 1012.1
5. Power Calculation: VCC * IEE +0.5 (IOH + IOL) (VOH – VOL) (number of differential outputs used); IEE does not include current going off chip.
6. where VCC is 3.3V±5% or 2.5V±5%
7. Inputs have internal pull-up/pull-down or biasing resistors which affect the input current.
8. Refer to Figure 1
9. VX(AC) is the crosspoint of the differential HSTL input signal. Normal AC operation is obtained when the crosspoint is within the VX(AC) range and the input
swing lies within the VDIF(AC) specification. Violation of VX(AC) or VDIF(AC) impacts the device propagation delay, device and part-to-part skew. Refer to Fig. 2.
10. Equivalent to a termination of 50
Ω to VTT. IOHMIN=(VOHMIN-VTT)/50; IOHMAX=(VOHMAX-VTT)/50; IOLMIN=(VOLMIN-VTT)/50; IOLMAX=(VOLMAX-VTT)/50;
11. VIL will operate down to VEE; VIH will operate up to VCC


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