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S25FL040A0LNFI023 Datasheet(PDF) 3 Page - SPANSION |
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S25FL040A0LNFI023 Datasheet(HTML) 3 Page - SPANSION |
3 / 35 page This document states the current technical specifications regarding the Spansion product(s) described herein. The Preliminary status of this document indicates that product qual- ification has been completed, and that initial production has begun. Due to the phases of the manufacturing process that require maintaining efficiency and quality, this document may be revised by subsequent versions or modifications due to changes in technical specifications. Publication Number S25FL040A_00 Revision B0 Issue Date August 31, 2006 Distinctive Characteristics Architectural Advantages Single power supply operation – Full voltage range: 2.7 to 3.6 V read and program operations Memory Architecture – 4Mb uniform 64KB sector product: Backward compatible with S25FL004A 4Mb device; same pin out, command set and uniform sector size (64KB) – 4Mb small sector product: Offer Top Boot & Bottom Boot devices; Seven sectors of 64KB and One 64KB sector (Top or bottom) broken into two sectors of 16KB each, two sectors of 4KB each, and two sectors of 12KB each. Program – Page Program (up to 256 bytes) in 1.5 ms (typical) – Program operations are on a page by page basis Erase – 0.5 s typical sector erase time – 3 s typical bulk erase time Cycling Endurance – 100,000 cycles per sector typical Data Retention – 20 years typical Device ID – JEDEC standard two-byte electronic signature – RES command one-byte electronic signature for backward compatibility Process Technology – Manufactured on 0.20 µm MirrorBit TM process technology Package Option – Industry Standard Pinouts – 8-pin SO package (150 mils) – 8-pin SO package (208 mils) – 8-Contact WSON Package (5 x 6 mm) Performance Characteristics Speed – 50 MHz clock rate (maximum) Power Saving Standby Mode – Standby Mode 20 µA (max) – Deep Power Down Mode 1.5 µA (typical) Memory Protection Features Memory Protection – W# pin works in conjunction with Status Register Bits to protect specified memory areas – Status Register Block Protection bits (BP2, BP1, BP0) in status register configure parts of memory as read-only Software Features – SPI Bus Compatible Serial Interface S25FL040A 4 Megabit CMOS 3.0 Volt Flash Memory with 50MHz SPI (Serial Peripheral Interface) Bus and Small Sector for Boot and Parameter Storage Data Sheet (Preliminary) |
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