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S71GLXXXNC0 Datasheet(PDF) 2 Page - SPANSION |
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2 / 122 page 2 S71GL512_256_128NC0_00_A0 December 17, 2004 Advan ce In form ati o n S71GLxxxNC0 General Description . . . . . . . . . . . . . . . . . . . . . . . . 1 Product Selector Guide . . . . . . . . . . . . . . . . . . . . . 4 MCP Block Diagram (128Mb Flash + 64Mb pSRAM) ..................................5 MCP Block Diagram (256Mb Flash + 64Mb pSRAM) .................................5 MCP Block Diagram (512Mb Flash + 64Mb pSRAM) ..................................6 Connection Diagrams . . . . . . . . . . . . . . . . . . . . . . 7 512 Mb Flash + 64 Mb pSRAM Pinout .............................................................7 256 Mb Flash + 64 Mb pSRAM Pinout ............................................................8 128 Mb Flash + 64 Mb pSRAM Pinout .............................................................9 Input/Output Descriptions . . . . . . . . . . . . . . . . . . . 10 Logic Symbol . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 10 Ordering Information . . . . . . . . . . . . . . . . . . . . . . . 11 Physical Dimensions . . . . . . . . . . . . . . . . . . . . . . . 15 TLD084—84-ball Fine-Pitch Ball Grid Array (FBGA) 9.0 x 12.0 x1.2 mm MCP Compatible Package ................................................................................15 TLA084—84-ball Fine-Pitch Ball Grid Array (FBGA) 8.0 x 11.6 x1.2 mm MCP Compatible Package ............................................................................... 16 S29GLxxxN MirrorBitTM Flash Family General Description . . . . . . . . . . . . . . . . . . . . . . . 18 Product Selector Guide . . . . . . . . . . . . . . . . . . . . .20 Block Diagram . . . . . . . . . . . . . . . . . . . . . . . . . . . 21 Pin Description . . . . . . . . . . . . . . . . . . . . . . . . . . . 22 Logic Symbol . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 23 S29GL512N ........................................................................................................23 S29GL256N .......................................................................................................23 S29GL128N .......................................................................................................23 Device Bus Operations . . . . . . . . . . . . . . . . . . . . . .24 Table 1. Device Bus Operations ........................................... 24 VersatileIOTM (VIO) Control ............................................................................ 24 Requirements for Reading Array Data ........................................................ 24 Page Mode Read ..............................................................................................25 Writing Commands/Command Sequences .................................................25 Write Buffer .....................................................................................................25 Accelerated Program Operation ...............................................................25 Autoselect Functions .................................................................................... 26 Standby Mode ...................................................................................................... 26 Automatic Sleep Mode ..................................................................................... 26 RESET#: Hardware Reset Pin ........................................................................ 26 Output Disable Mode ........................................................................................27 Table 2. Sector Address Table–S29GL512N ........................... 27 Table 3. Sector Address Table–S29GL256N ........................... 42 Table 4. Sector Address Table–S29GL128N ........................... 49 Autoselect Mode .................................................................................................53 Table 5. Autoselect Codes, (High Voltage Method) ................ 54 Sector Protection ................................................................................................54 Persistent Sector Protection .......................................................................54 Password Sector Protection ........................................................................54 WP# Hardware Protection .........................................................................54 Selecting a Sector Protection Mode .........................................................54 Advanced Sector Protection ...........................................................................55 Lock Register ........................................................................................................55 Table 6. Lock Register ........................................................ 56 Persistent Sector Protection ...........................................................................56 Dynamic Protection Bit (DYB) ...................................................................56 Persistent Protection Bit (PPB) ..................................................................57 Persistent Protection Bit Lock (PPB Lock Bit) ......................................57 Table 7. Sector Protection Schemes ......................................58 Persistent Protection Mode Lock Bit ........................................................... 58 Password Sector Protection ........................................................................... 59 Password and Password Protection Mode Lock Bit ............................... 59 64-bit Password ..................................................................................................60 Persistent Protection Bit Lock (PPB Lock Bit) ..........................................60 Secured Silicon Sector Flash Memory Region ...........................................60 Write Protect (WP#) .......................................................................................62 Hardware Data Protection ............................................................................. 62 Low VCC Write Inhibit ...............................................................................62 Write Pulse “Glitch” Protection ............................................................... 62 Logical Inhibit ................................................................................................... 62 Power-Up Write Inhibit ...............................................................................62 Common Flash Memory Interface (CFI) . . . . . . . 62 Table 8. CFI Query Identification String ................................ 63 Table 9. System Interface String.......................................... 64 Table 10. Device Geometry Definition ................................... 65 Table 11. Primary Vendor-Specific Extended Query ................ 66 Command Definitions . . . . . . . . . . . . . . . . . . . . . . 66 Reading Array Data ........................................................................................... 67 Reset Command ................................................................................................. 67 Autoselect Command Sequence ................................................................... 67 Enter Secured Silicon Sector/Exit Secured Silicon Sector Command Sequence ............................................................................68 Word Program Command Sequence ..........................................................68 Unlock Bypass Command Sequence ........................................................69 Write Buffer Programming .........................................................................69 Accelerated Program ....................................................................................70 Figure 1. Write Buffer Programming Operation....................... 71 Figure 2. Program Operation ............................................... 72 Program Suspend/Program Resume Command Sequence .................... 72 Figure 3. Program Suspend/Program Resume........................ 73 Chip Erase Command Sequence ....................................................................73 Sector Erase Command Sequence ................................................................ 74 Figure 4. Erase Operation ................................................... 75 Erase Suspend/Erase Resume Commands .................................................. 75 Lock Register Command Set Definitions .................................................... 76 Password Protection Command Set Definitions ...................................... 76 Non-Volatile Sector Protection Command Set Definitions .................. 78 Global Volatile Sector Protection Freeze Command Set ...................... 78 Volatile Sector Protection Command Set .................................................. 79 Secured Silicon Sector Entry Command .....................................................80 Secured Silicon Sector Exit Command ........................................................80 Command Definitions ........................................................................................ 81 Table 12. S29GL512N, S29GL256N, S29GL128N Command Definitions, x16 .................................................................81 Write Operation Status ...................................................................................84 DQ7: Data# Polling ...........................................................................................84 Figure 5. Data# Polling Algorithm ........................................ 85 RY/BY#: Ready/Busy# .......................................................................................85 DQ6: Toggle Bit I ...............................................................................................86 Figure 6. Toggle Bit Algorithm ............................................. 87 DQ2: Toggle Bit II ..............................................................................................87 Reading Toggle Bits DQ6/DQ2 .....................................................................88 DQ5: Exceeded Timing Limits ........................................................................88 DQ3: Sector Erase Timer ................................................................................88 DQ1: Write-to-Buffer Abort ...........................................................................89 Table 13. Write Operation Status .........................................89 Absolute Maximum Ratings . . . . . . . . . . . . . . . . 90 Figure 7. Maximum Negative Overshoot Waveform................. 90 |
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