MC54/74HC14A

MOTOROLA

High–Speed CMOS Logic Data

DL129 — Rev 6

4

VCC

V

Guaranteed Limit

Symbol

Parameter

VCC

V

–55 to 25

°C

≤85°C

≤125°C

Unit

tPLH,

tPHL

Maximum Propagation Delay, Input A or B to Output Y

(Figures 1 and 2)

2.0

3.0

4.5

6.0

75

30

15

13

95

40

19

16

110

55

22

19

ns

tTLH,

tTHL

Maximum Output Transition Time, Any Output

(Figures 1 and 2)

2.0

3.0

4.5

6.0

75

27

15

13

95

32

19

16

110

36

22

19

ns

Cin

Maximum Input Capacitance

10

10

10

pF

NOTE: For propagation delays with loads other than 50 pF, and information on typical parametric values, see Chapter 2 of the Motorola High–

Speed CMOS Data Book (DL129/D).

CPD

Power Dissipation Capacitance (Per Inverter)*

Typical @ 25

°C, VCC = 5.0 V

pF

CPD

Power Dissipation Capacitance (Per Inverter)*

22

pF

* Used to determine the no–load dynamic power consumption: PD = CPD VCC2f + ICC VCC. For load considerations, see Chapter 2 of the

Motorola High–Speed CMOS Data Book (DL129/D).

Figure 1. Switching Waveforms

GND

VCC

OUTPUT Y

INPUT A

CL*

*Includes all probe and jig capacitance

TEST

POINT

90%

50%

10%

tTLH

DEVICE

UNDER

TEST

OUTPUT

Figure 2. Test Circuit

tTHL

90%

50%

10%

tPLH

tPHL

tf

tr