June 1, 2006 S72WS-N_00_A8

S72WS-N Based MCP/PoP Products

5

Advance

Informatio n

2

MCP Block Diagram

2.1

NOR Flash + ORNAND Flash + DRAM Products

Notes:

1. For a one-Flash configuration, F1-CE# = CE#.

For a two-Flash configuration, F1-CE# = CE for Flash 1 and F2-CE# = CE for Flash 2; F2-CE# is the

chip-enable pin for the second Flash.

2. If ORNAND is not present in the MCP, then the MS01GP block will not be present in the figure above. In

that case, the common signals go only to the WS256N flash, while the SDRAM signals remain unchanged.

3. If ORNAND supports a x16 bus, then NOR DQ0-DQ15 is shared with ORNAND I/O0-I/O15.

DQ0:7

DQ0:15

DQ0:7

A23-A0

F-A23:A0

A12-A0

OE#

CE#

F-OE#

WE#

F-WE#

CE#

F1-CE#

WS256N

WE#

BA0

RAS#

CKE

CAS#

SDRAM

DM0

DM1

RDY

RDY

RESET#

F-RESET#

WP#

F-WP#

MS01GP

IO0:7

RY/BY#

RY/BY#

RE#

WE#

N-RE#

CE#

N-WE#

N-CE#

WP#

N-WP#

ALE

N-ALE

CLE

N-CLE

F-Vcc

D-Vcc

N-Vcc

F2-CE#

PRE

N-PRE

CE#

V-Vccq

BA1

D-A12-A0

D-CE#

D-WE#

D-BA0

D-RAS#

D-CKE

D-CAS#

D-DM0

D-DM1

D-BA1

Vss

Vss

D-Vss

D-Vssq

D-DQ15-DQ0

ACC

F-ACC

F-CLK

F-AVD#

CLK

AVD#

DQ8:15

DQ8:15

F-VCCQ