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EVAL-ADM1191EBZ1 Datasheet(PDF) 6 Page - Analog Devices |
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EVAL-ADM1191EBZ1 Datasheet(HTML) 6 Page - Analog Devices |
6 / 16 page ADM1191 Rev. 0 | Page 6 of 16 PIN CONFIGURATION AND FUNCTION DESCRIPTIONS VCC 1 SENSE 2 CONV 3 GND 4 SETV 5 ALERTB 10 A1 9 A0 8 SDA 7 SCL 6 ADM1191ARMZ TOP VIEW (Not to Scale) Figure 3. Pin Configuration Table 4. Pin Function Descriptions Pin No. Mnemonic Description 1 VCC Positive Supply Input Pin. The operating supply voltage range is from 3.15 V to 26 V. An undervoltage lockout (UVLO) circuit resets the ADM1191 when a low supply voltage is detected. 2 SENSE Current Sense Input Pin. A sense resistor between the VCC pin and the SENSE pin generates a voltage across a sense resistor. This voltage is proportional to the load current. A current sense amplifier amplifies this voltage before it is digitized by the ADC. 3 CONV Convert Start Pin. A high level on this pin enables an ADC conversion. The state of an internal control register, which is set through the I2C interface, configures the part to convert current only, voltage only, or both channels when the convert pin is asserted. 4 GND Chip Ground Pin. 5 SETV Input Pin. The voltage driven onto this pin is compared to the output of the internal current sense amplifier. The lower the voltage on the SETV, the lower the current level that causes the ALERTB output to assert. 6 SCL I2C Clock Pin. Open-drain input; requires an external resistive pull-up. 7 SDA I2C Data I/O Pin. Open-drain input/output; requires an external resistive pull-up. 8 A0 I2C Address Pin. This pin can be tied low, tied high, left floating, or tied low through a resistor. Sixteen different I2C address options are available, depending on the external configuration of the A0 pin and the A1 pin. 9 A1 I2C Address Pin. This pin can be tied low, tied high, left floating, or tied low through a resistor. Sixteen different I2C address options are available, depending on the external configuration of the A0 pin and the A1 pin. 10 ALERTB Alert Output Pin. Active-low, open-drain configuration. This pin asserts low when an overcurrent condition is present. The level at which an overcurrent condition is detected depends on the voltage on the SETV pin. |
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