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PCI2030 Datasheet(PDF) 1 Page - Texas Instruments |
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PCI2030 Datasheet(HTML) 1 Page - Texas Instruments |
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1 / 14 page  PCI2030 PCI-TO-PCI BRIDGE XCPS012 – DECEMBER 1997 1 POST OFFICE BOX 655303 • DALLAS, TEXAS 75265 D Supports PCI Local Bus Specification 2.1 and PCI-to-PCI Bridge Specification 1.0 D 3.3-V Core Logic With Universal PCI Interfaces Compatible With 3.3-V and 5-V PCI Signaling Environments D Supports Two 32-Bit, 33-MHz PCI Buses D Provides Internal Arbitration for Up to Six Secondary Bus Masters With Programmable Control D Provides Six Secondary PCI Bus Clock Outputs D Supports Burst Transfers to Maximize Data Throughput on Both PCI Buses D Provides Two Extension Windows D EEPROM Interface for Loading Texas Instruments (TI ™) Subsystem ID and Subsystem Vendor ID D Four Primary and Four Secondary General-Purpose I/Os D Independent Read and Write Buffers for Each Direction D Secondary Positive Decode D Predictable Latency: Compliant With PCI Local Bus Specification 2.1 D External Arbiter Option D Provides Concurrent Operation D Serial IRQ Bridging D Propagates Bus Locking D Supports PCI Clock Run D Secondary Bus Driven Low During Reset D Docking Connect Detects D PCI Local Bus Specification 2.0-Compliant Device Optimization D Advanced Submicron, Low-Power CMOS Technology D Provides VGA/Palette Memory and I/O, and Subtractive Decoding Options D Packaged in 176-Pin Plastic Quad Flatpack Description 2 . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . System Block Diagram 2 . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . Terminal Assignments 3 . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . Terminal Functions 4 . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . Absolute Maximum Ratings 9 . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . Recommended Operating Conditions 9 . . . . . . . . . . . . . . . . . . . . . Recommended Operating Conditions for PCI Interface 9 . . . . . . Electrical Characteristics 10 . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . PCI Clock/Reset Timing Requirements 10 . . . . . . . . . . . . . . . . . . . . . . PCI Timing Requirements 10 . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . Parameter Measurement Information 11 . . . . . . . . . . . . . . . . . . . . . . . . PCI Bus Parameter Measurement Information 12 . . . . . . . . . . . . . . . . Mechanical Data 13 . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . Table of Contents Copyright © 1997, Texas Instruments Incorporated PRODUCTION DATA information is current as of publication date. Products conform to specifications per the terms of Texas Instruments standard warranty. Production processing does not necessarily include testing of all parameters. Please be aware that an important notice concerning availability, standard warranty, and use in critical applications of Texas Instruments semiconductor products and disclaimers thereto appears at the end of this data sheet. TI is a trademark of Texas Instruments Incorporated. |
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