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S70GL01GN00FAI120 Datasheet(PDF) 10 Page - SPANSION |
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S70GL01GN00FAI120 Datasheet(HTML) 10 Page - SPANSION |
10 / 83 page 8 S70GL01GN00 MirrorBitTM Flash S70GL01GN00_00_A1 June 1, 2005 Ad vance Information Pin Description A24–A0 = 25 Address inputs (512 Mb) DQ14–DQ0 = 15 Data inputs/outputs DQ15/A-1 = DQ15 (Data input/output, word mode), A-1 (LSB Address input, byte mode) CE# = Chip Enable input CE2# = Chip Enable input for second die OE# = Output Enable input WE# = Write Enable input WP#/ACC = Hardware Write Protect input; Acceleration input RESET# = Hardware Reset Pin input BYTE# = Selects 8-bit or 16-bit mode RY/BY# = Ready/Busy output VCC = 3.0 volt-only single power supply (see Product Selector Guide for speed options and voltage supply tolerances) VIO = Output Buffer power VSS = Device Ground NC = Pin Not Connected Internally Logic Symbol S70GL01GN 25 16 or 8 DQ15–DQ0 (A-1) A24–A0 CE# OE# WE# RESET# RY/BY# WP#/ACC VIO BYTE# CE2# |
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