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S70GL01GN00FFI123 Datasheet(PDF) 3 Page - SPANSION |
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S70GL01GN00FFI123 Datasheet(HTML) 3 Page - SPANSION |
3 / 83 page This document contains information on a product under development at Spansion LLC. The information is intended to help you evaluate this product. Spansion LLC reserves the right to change or discontinue work on this proposed product without notice. Publication Number S70GL01GN00_00 Revision A Amendment 1 Issue Date June 1, 2005 ADVANCE INFORMATION S70GL01GN00 MirrorBitTM Flash 1024 Megabit, 3.0 Volt-only Page Mode Flash Memory featuring 110 nm MirrorBit™ Process Technology Data Sheet Distinctive Characteristics Architectural Advantages Two 512 Megabit (S29GL512N) in a single 64-ball Fortified-BGA package Two Chip Enable pins — Two CE# pins to control selection of each internal S29GL512N devices Single power supply operation — 3 volt read, erase, and program operations Manufactured on 110 nm MirrorBit process technology Secured Silicon Sector region — 128-word/256-byte sector for permanent, secure identification through an 8-word/16-byte random Electronic Serial Number, accessible through a command sequence Flexible sector architecture — Each internal S29GL512N device has five hundred- twelve 64Kword (128Kbyte) sector Compatibility with JEDEC standards — Provides pinout and software compatibility for single- power supply flash, and superior inadvertent write protection 100,000 erase cycles per sector typical 20-year data retention typical Performance Characteristics High performance — 110 ns (S29GL512N) — 8-word/16-byte page read buffer — 25 ns page read times — 16-word/32-byte write buffer reduces overall programming time for multiple-word updates Low power consumption (typical values at 3.0 V, 5 MHz) — 25 mA typical active read current; — 50 mA typical erase/program current — 1 µA typical standby mode current Package options — 64-ball Fortified BGA Software & Hardware Features Software features — Program Suspend and Resume: read other sectors before programming operation is completed — Erase Suspend and Resume: read/program other sectors before an erase operation is completed — Data# polling and toggle bits provide status — Unlock Bypass Program command reduces overall multiple-word programming time — CFI (Common Flash Interface) compliant: allows host system to identify and accommodate multiple flash devices Hardware features — Advanced Sector Protection — WP#/ACC input accelerates programming time (when high voltage is applied) for greater throughput during system production. Protects first or last sector regardless of sector protection settings — Hardware reset input (RESET#) resets device — Ready/Busy# output (RY/BY#) detects program or erase cycle completion |
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