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INA202AIDGKRG4 Datasheet(PDF) 2 Page - Burr-Brown (TI) |
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INA202AIDGKRG4 Datasheet(HTML) 2 Page - Burr-Brown (TI) |
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2 / 19 page  INA200 INA201 INA202 SBOS374 − NOVEMBER 2006 www.ti.com 2 ABSOLUTE MAXIMUM RATINGS(1) Supply Voltage, V+ 18V . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . Current-Shunt Monitor Analog Inputs, VIN+, VIN− Differential (VIN+) − (VIN−) −18V to +18V . . . . . . . . . . . . . . . . . . Common Mode(2) −16V to +80V . . . . . . . . . . . . . . . . . . . . . . . . Comparator Analog Input and Reset Pins(2) . . . . . . . . . . . . . . . . . GND − 0.3V to (V+) + 0.3V . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . Analog Output, Out(2) GND − 0.3V to (V+) + 0.3V . . . . . . . . . . . . . Comparator Output, Out Pin(2) GND − 0.3V to 18V . . . . . . . . . . . . . Input Current Into Any Pin(2) 5mA . . . . . . . . . . . . . . . . . . . . . . . . . . Operating Temperature −55 °C to +150°C . . . . . . . . . . . . . . . . . . . . . Storage Temperature −65 °C to +150°C . . . . . . . . . . . . . . . . . . . . . . . Junction Temperature +150 °C . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . ESD Ratings: Human Body Model (HBM) 4000V . . . . . . . . . . . . . . . . . . . . . . . Charged Device Model (CDM) 1000V . . . . . . . . . . . . . . . . . . . . (1) Stresses above these ratings may cause permanent damage. Exposure to absolute maximum conditions for extended periods may degrade device reliability. These are stress ratings only, and functional operation of the device at these or any other conditions beyond those specified is not supported. (2) This voltage may exceed the ratings shown if the current at that pin is limited to 5mA. This integrated circuit can be damaged by ESD. Texas Instruments recommends that all integrated circuits be handled with appropriate precautions. Failure to observe proper handling and installation procedures can cause damage. ESD damage can range from subtle performance degradation to complete device failure. Precision integrated circuits may be more susceptible to damage because very small parametric changes could cause the device not to meet its published specifications. ORDERING INFORMATION(1) PRODUCT GAIN PACKAGE-LEAD PACKAGE DESIGNATOR PACKAGE MARKING INA200 20V/V MSOP-8 DGK BQH INA200 20V/V SO-8(2) D INA200A INA201 50V/V MSOP-8 DGK BQJ INA201 50V/V SO-8(2) D INA201A INA202 100V/V MSOP-8 DGK BQL INA202 100V/V SO-8(2) D INA202A (1) For the most current package and ordering information see the Package Option Addendum at the end of this document, or see the TI web site at www.ti.com. (2) Available Q1, 2007. PIN CONFIGURATIONS 1 2 3 4 8 7 6 5 V IN+ V IN − CMP OUT RESET V+ OUT CMP IN GND INA200−INA202 MSOP−8 (DGK) SO−8 (D) TOP VIEW |
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